Lines Matching +full:0 +full:x15

24  * similarly for row 'd'.  (brot, drot) start out as (0, 0) but we make it such
42 	X15	.req	r14
110 	__strd		X8_X10, X9_X11, sp, 0
113 	// quarterrounds: (x2, x6, x10, x14) and (x3, x7, x11, x15)
114 	_halfround	X2, X6, X8_X10, X14,  X3, X7, X9_X11, X15
121 	// quarterrounds: (x0, x5, x10, x15) and (x1, x6, x11, x12)
122 	_halfround	X0, X5, X8_X10, X15,  X1, X6, X9_X11, X12
126 	__ldrd		X8_X10, X9_X11, sp, 0
133 	.set brot, 0
134 	.set drot, 0
143 	// Stack: unused0-unused1 x10-x11 x0-x15 OUT IN LEN
144 	// Registers contain x0-x9,x12-x15.
146 	// Do the core ChaCha permutation to update x0-x15.
151 	// Registers contain x0-x9,x12-x15.
152 	// x4-x7 are rotated by 'brot'; x12-x15 are rotated by 'drot'.
154 	// Free up some registers (r8-r12,r14) by pushing (x8-x9,x12-x15).
155 	push		{X8_X10, X9_X11, X12, X13, X14, X15}
175 	// Stack: x8-x9 x12-x15 x10-x11 orig_x0-orig_x15 OUT IN LEN
177 	// x4-x7 are rotated by 'brot'; x12-x15 are rotated by 'drot'.
209 	// x8-x15
210 	pop		{r0-r7}			// (x8-x9,x12-x15,x10-x11)
230 	add		r5, r11, r5, ror #drot	// x15
236 	eor		r5, r5, r7		// x15
244 	// Stack: x0-x15 OUT IN LEN
264 	ldmia		r14, {r10-r12,r14}	// load x12-x15
276 	// Stack: ks0-ks15 x8-x9 x12-x15 x10-x11 orig_x0-orig_x15 OUT IN LEN
278 	// x4-x7 are rotated by 'brot'; x12-x15 are rotated by 'drot'.
301 	// Save keystream for x8-x15
302 	ldm		r8, {r0-r7}		// (x8-x9,x12-x15,x10-x11)
316 	add		r5, r11, r5, ror #drot	// x15
320 	// Stack: ks0-ks15 unused0-unused7 x0-x15 OUT IN LEN
373 	cmp		r2, #0			// len == 0?
381 	// Push state x0-x15 onto stack.
385 	ldm		X12, {X12,X13,X14,X15}
386 	push		{X12,X13,X14,X15}
402 0:	add		sp, #76
406 	b		0b
420 	ldm		r14, {r10-r12,r14}	// load x12-x15
427 0:	add		sp, #16
429 	// Fix up rotations of x12-x15
434 	ror		X15, X15, #drot
436 	// Store (x0-x3,x12-x15) to 'out'
437 	stm		r4, {X0,X1,X2,X3,X12,X13,X14,X15}
442 	b		0b