Lines Matching +full:- +full:clock
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device Tree Source for OMAP3430 ES1 clock data
9 #clock-cells = <0>;
10 compatible = "ti,wait-gate-clock";
13 ti,bit-shift = <0>;
17 #clock-cells = <0>;
18 compatible = "ti,divider-clock";
20 ti,max-div = <7>;
22 ti,index-starts-at-one;
26 #clock-cells = <0>;
27 compatible = "fixed-factor-clock";
29 clock-mult = <1>;
30 clock-div = <1>;
34 #clock-cells = <0>;
35 compatible = "ti,wait-gate-clock";
38 ti,bit-shift = <1>;
42 #clock-cells = <0>;
43 compatible = "ti,wait-gate-clock";
46 ti,bit-shift = <2>;
49 clock@a00 {
52 #clock-cells = <2>;
53 #address-cells = <0>;
55 d2d_26m_fck: clock-d2d-26m-fck {
56 #clock-cells = <0>;
57 compatible = "ti,wait-gate-clock";
58 clock-output-names = "d2d_26m_fck";
60 ti,bit-shift = <3>;
63 fshostusb_fck: clock-fshostusb-fck {
64 #clock-cells = <0>;
65 compatible = "ti,wait-gate-clock";
66 clock-output-names = "fshostusb_fck";
68 ti,bit-shift = <5>;
71 ssi_ssr_gate_fck_3430es1: clock-ssi-ssr-gate-fck-3430es1 {
72 #clock-cells = <0>;
73 compatible = "ti,composite-no-wait-gate-clock";
74 clock-output-names = "ssi_ssr_gate_fck_3430es1";
76 ti,bit-shift = <0>;
80 clock@a40 {
83 #clock-cells = <2>;
84 #address-cells = <0>;
86 ssi_ssr_div_fck_3430es1: clock-ssi-ssr-div-fck-3430es1 {
87 #clock-cells = <0>;
88 compatible = "ti,composite-divider-clock";
89 clock-output-names = "ssi_ssr_div_fck_3430es1";
91 ti,bit-shift = <8>;
95 usb_l4_div_ick: clock-usb-l4-div-ick {
96 #clock-cells = <0>;
97 compatible = "ti,composite-divider-clock";
98 clock-output-names = "usb_l4_div_ick";
100 ti,bit-shift = <4>;
101 ti,max-div = <1>;
102 ti,index-starts-at-one;
107 #clock-cells = <0>;
108 compatible = "ti,composite-clock";
113 #clock-cells = <0>;
114 compatible = "fixed-factor-clock";
116 clock-mult = <1>;
117 clock-div = <2>;
120 clock@a10 {
123 #clock-cells = <2>;
124 #address-cells = <0>;
126 hsotgusb_ick_3430es1: clock-hsotgusb-ick-3430es1 {
127 #clock-cells = <0>;
128 compatible = "ti,omap3-no-wait-interface-clock";
129 clock-output-names = "hsotgusb_ick_3430es1";
131 ti,bit-shift = <4>;
134 fac_ick: clock-fac-ick {
135 #clock-cells = <0>;
136 compatible = "ti,omap3-interface-clock";
137 clock-output-names = "fac_ick";
139 ti,bit-shift = <8>;
142 ssi_ick: clock-ssi-ick-3430es1 {
143 #clock-cells = <0>;
144 compatible = "ti,omap3-no-wait-interface-clock";
145 clock-output-names = "ssi_ick_3430es1";
147 ti,bit-shift = <0>;
150 usb_l4_gate_ick: clock-usb-l4-gate-ick {
151 #clock-cells = <0>;
152 compatible = "ti,composite-interface-clock";
153 clock-output-names = "usb_l4_gate_ick";
155 ti,bit-shift = <5>;
160 #clock-cells = <0>;
161 compatible = "fixed-factor-clock";
163 clock-mult = <1>;
164 clock-div = <1>;
168 #clock-cells = <0>;
169 compatible = "ti,composite-clock";
173 clock@e00 {
176 #clock-cells = <2>;
177 #address-cells = <0>;
179 dss1_alwon_fck: clock-dss1-alwon-fck-3430es1 {
180 #clock-cells = <0>;
181 compatible = "ti,gate-clock";
182 clock-output-names = "dss1_alwon_fck_3430es1";
184 ti,bit-shift = <0>;
185 ti,set-rate-parent;
190 #clock-cells = <0>;
191 compatible = "ti,omap3-no-wait-interface-clock";
194 ti,bit-shift = <0>;