Lines Matching +full:0 +full:x2002d000
35 #clock-cells = <0>;
41 reg = <0x10090000 0x10000>;
52 reg = <0x10104000 0x800>;
64 reg = <0x10138000 0x1000>;
71 reg = <0x1013c000 0x100>;
76 reg = <0x1013c200 0x20>;
90 reg = <0x1013c600 0x20>;
99 reg = <0x1013d000 0x1000>,
100 <0x1013c100 0x0100>;
105 reg = <0x10124000 0x400>;
116 reg = <0x10126000 0x400>;
127 reg = <0x1012d000 0x20>;
132 reg = <0x1012e000 0x20>;
137 reg = <0x1012f000 0x20>;
142 reg = <0x1012f080 0x20>;
147 reg = <0x1012f100 0x20>;
152 reg = <0x1012f180 0x20>;
157 reg = <0x1012f200 0x20>;
162 reg = <0x1012f280 0x20>;
167 reg = <0x10180000 0x40000>;
182 reg = <0x101c0000 0x40000>;
194 reg = <0x10204000 0x3c>;
209 reg = <0x10214000 0x1000>;
223 reg = <0x10218000 0x1000>;
237 reg = <0x1021c000 0x1000>;
251 reg = <0x10500000 0x4000>;
260 reg = <0x20004000 0x100>;
264 offset = <0x40>;
274 reg = <0x20008000 0x200>;
279 reg = <0x20018000 0x4000>;
280 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
291 reg = <0x2001c000 0x4000>;
292 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
304 reg = <0x2002d000 0x1000>;
307 #size-cells = <0>;
319 reg = <0x2002f000 0x1000>;
322 #size-cells = <0>;
334 reg = <0x20030000 0x10>;
342 reg = <0x20030010 0x10>;
350 reg = <0x2004c000 0x100>;
358 reg = <0x20050020 0x10>;
366 reg = <0x20050030 0x10>;
374 reg = <0x20056000 0x1000>;
377 #size-cells = <0>;
389 reg = <0x2005a000 0x1000>;
392 #size-cells = <0>;
404 reg = <0x2005e000 0x1000>;
407 #size-cells = <0>;
419 reg = <0x20064000 0x400>;
430 reg = <0x20068000 0x400>;
441 reg = <0x2006c000 0x100>;
456 reg = <0x20070000 0x1000>;
458 #size-cells = <0>;
469 reg = <0x20074000 0x1000>;
471 #size-cells = <0>;
479 reg = <0x20078000 0x4000>;