Lines Matching +full:gpio +full:- +full:mux
1 // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 #include <dt-bindings/interrupt-controller/irq.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
23 #address-cells = <1>;
24 #size-cells = <0>;
27 compatible = "arm,arm926ej-s";
33 clk24m: clock-24mhz {
35 compatible = "fixed-clock";
36 clock-frequency = <24000000>;
37 #clock-cells = <0>;
40 refclk: clock-48mhz {
42 compatible = "fixed-clock";
43 clock-output-names = "ref";
44 clock-frequency = <48000000>;
45 #clock-cells = <0>;
49 compatible = "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <1>;
52 interrupt-parent = <&aic>;
56 compatible = "nuvoton,wpcm450-gcr", "syscon", "simple-mfd";
60 clk: clock-controller@b0000200 {
61 compatible = "nuvoton,wpcm450-clk";
64 clock-names = "ref";
65 #clock-cells = <1>;
66 #reset-cells = <1>;
70 compatible = "nuvoton,wpcm450-uart";
72 reg-shift = <2>;
75 pinctrl-names = "default";
76 pinctrl-0 = <&bsp_pins>;
81 compatible = "nuvoton,wpcm450-uart";
83 reg-shift = <2>;
90 compatible = "nuvoton,wpcm450-timer";
97 compatible = "nuvoton,wpcm450-wdt";
103 aic: interrupt-controller@b8002000 {
104 compatible = "nuvoton,wpcm450-aic";
106 interrupt-controller;
107 #interrupt-cells = <2>;
111 compatible = "nuvoton,wpcm450-pinctrl";
113 #address-cells = <1>;
114 #size-cells = <0>;
116 gpio0: gpio@0 {
118 gpio-controller;
119 #gpio-cells = <2>;
123 interrupt-controller;
126 gpio1: gpio@1 {
128 gpio-controller;
129 #gpio-cells = <2>;
131 interrupt-controller;
134 gpio2: gpio@2 {
136 gpio-controller;
137 #gpio-cells = <2>;
140 gpio3: gpio@3 {
142 gpio-controller;
143 #gpio-cells = <2>;
146 gpio4: gpio@4 {
148 gpio-controller;
149 #gpio-cells = <2>;
152 gpio5: gpio@5 {
154 gpio-controller;
155 #gpio-cells = <2>;
158 gpio6: gpio@6 {
160 gpio-controller;
161 #gpio-cells = <2>;
164 gpio7: gpio@7 {
166 gpio-controller;
167 #gpio-cells = <2>;
170 smb3_pins: mux-smb3 {
175 smb4_pins: mux-smb4 {
180 smb5_pins: mux-smb5 {
185 scs1_pins: mux-scs1 {
190 scs2_pins: mux-scs2 {
195 scs3_pins: mux-scs3 {
200 smb0_pins: mux-smb0 {
205 smb1_pins: mux-smb1 {
210 smb2_pins: mux-smb2 {
215 bsp_pins: mux-bsp {
220 hsp1_pins: mux-hsp1 {
225 hsp2_pins: mux-hsp2 {
230 r1err_pins: mux-r1err {
235 r1md_pins: mux-r1md {
240 rmii2_pins: mux-rmii2 {
245 r2err_pins: mux-r2err {
250 r2md_pins: mux-r2md {
255 kbcc_pins: mux-kbcc {
260 dvo0_pins: mux-dvo0 {
265 dvo3_pins: mux-dvo3 {
270 clko_pins: mux-clko {
275 smi_pins: mux-smi {
280 uinc_pins: mux-uinc {
285 gspi_pins: mux-gspi {
290 mben_pins: mux-mben {
295 xcs2_pins: mux-xcs2 {
300 xcs1_pins: mux-xcs1 {
305 sdio_pins: mux-sdio {
310 sspi_pins: mux-sspi {
315 fi0_pins: mux-fi0 {
320 fi1_pins: mux-fi1 {
325 fi2_pins: mux-fi2 {
330 fi3_pins: mux-fi3 {
335 fi4_pins: mux-fi4 {
340 fi5_pins: mux-fi5 {
345 fi6_pins: mux-fi6 {
350 fi7_pins: mux-fi7 {
355 fi8_pins: mux-fi8 {
360 fi9_pins: mux-fi9 {
365 fi10_pins: mux-fi10 {
370 fi11_pins: mux-fi11 {
375 fi12_pins: mux-fi12 {
380 fi13_pins: mux-fi13 {
385 fi14_pins: mux-fi14 {
390 fi15_pins: mux-fi15 {
395 pwm0_pins: mux-pwm0 {
400 pwm1_pins: mux-pwm1 {
405 pwm2_pins: mux-pwm2 {
410 pwm3_pins: mux-pwm3 {
415 pwm4_pins: mux-pwm4 {
420 pwm5_pins: mux-pwm5 {
425 pwm6_pins: mux-pwm6 {
430 pwm7_pins: mux-pwm7 {
435 hg0_pins: mux-hg0 {
440 hg1_pins: mux-hg1 {
445 hg2_pins: mux-hg2 {
450 hg3_pins: mux-hg3 {
455 hg4_pins: mux-hg4 {
460 hg5_pins: mux-hg5 {
465 hg6_pins: mux-hg6 {
470 hg7_pins: mux-hg7 {
476 fiu: spi-controller@c8000000 {
477 compatible = "nuvoton,wpcm450-fiu";
478 #address-cells = <1>;
479 #size-cells = <0>;
481 reg-names = "control", "memory";
488 compatible = "nuvoton,wpcm450-shm", "syscon";
490 reg-io-width = <1>;