Lines Matching +full:0 +full:x1c00
8 #size-cells = <0>;
10 cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;
12 cfam@0,0 {
13 reg = <0 0>;
16 chip-id = <0>;
20 reg = <0x1000 0x400>;
25 reg = <0x1800 0x400>;
27 #size-cells = <0>;
29 cfam0_i2c0: i2c-bus@0 {
31 #size-cells = <0>;
32 reg = <0>; /* OMI01 */
37 #size-cells = <0>;
43 #size-cells = <0>;
49 #size-cells = <0>;
55 #size-cells = <0>;
61 #size-cells = <0>;
67 #size-cells = <0>;
73 #size-cells = <0>;
80 reg = <0x1c00 0x400>;
82 #size-cells = <0>;
84 cfam0_spi0: spi@0 {
85 reg = <0x0>;
87 #size-cells = <0>;
89 eeprom@0 {
90 at25,byte-len = <0x80000>;
95 reg = <0>;
101 reg = <0x20>;
103 #size-cells = <0>;
105 eeprom@0 {
106 at25,byte-len = <0x80000>;
111 reg = <0>;
117 reg = <0x40>;
120 #size-cells = <0>;
122 eeprom@0 {
123 at25,byte-len = <0x80000>;
128 reg = <0>;
134 reg = <0x60>;
137 #size-cells = <0>;
139 eeprom@0 {
140 at25,byte-len = <0x80000>;
145 reg = <0>;
153 reg = <0x2400 0x400>;
155 #size-cells = <0>;
169 reg = <0x3400 0x400>;
171 #size-cells = <0>;
177 cfam@1,0 {
178 reg = <1 0>;
185 reg = <0x1000 0x400>;
190 reg = <0x1800 0x400>;
192 #size-cells = <0>;
196 #size-cells = <0>;
202 #size-cells = <0>;
208 #size-cells = <0>;
214 #size-cells = <0>;
220 #size-cells = <0>;
226 #size-cells = <0>;
232 #size-cells = <0>;
238 #size-cells = <0>;
245 reg = <0x1c00 0x400>;
247 #size-cells = <0>;
249 cfam1_spi0: spi@0 {
250 reg = <0x0>;
252 #size-cells = <0>;
254 eeprom@0 {
255 at25,byte-len = <0x80000>;
260 reg = <0>;
266 reg = <0x20>;
268 #size-cells = <0>;
270 eeprom@0 {
271 at25,byte-len = <0x80000>;
276 reg = <0>;
282 reg = <0x40>;
285 #size-cells = <0>;
287 eeprom@0 {
288 at25,byte-len = <0x80000>;
293 reg = <0>;
299 reg = <0x60>;
302 #size-cells = <0>;
304 eeprom@0 {
305 at25,byte-len = <0x80000>;
310 reg = <0>;
318 reg = <0x2400 0x400>;
320 #size-cells = <0>;
334 reg = <0x3400 0x400>;
336 #size-cells = <0>;