Lines Matching +full:auto +full:- +full:load
1 # SPDX-License-Identifier: GPL-2.0-only
3 # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
88 source "arch/arc/plat-tb10x/Kconfig"
89 source "arch/arc/plat-axs10x/Kconfig"
90 source "arch/arc/plat-hsdk/Kconfig"
108 ISA for the Next Generation ARC-HS cores
126 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
128 -Caches: New Prog Model, Region Flush
129 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
132 bool "ARC-HS"
137 - SMP configurations of up to 4 cores with coherency
138 - Optional L2 Cache and IO-Coherency
139 - Revised Interrupt Architecture (multiple priorites, reg banks,
140 auto stack switch, auto regfile save/restore)
141 - MMUv4 (PIPT dcache, Huge Pages)
142 - Instructions for
143 * 64bit load/store: LDD, STD
153 string "Override default -mcpu compiler flag"
156 Override default -mcpu=xxx compiler flag (which is set depending on
167 bool "Symmetric Multi-Processing"
175 int "Maximum number of CPUs (2-4096)"
180 bool "Enable Halt-on-reset boot mode"
182 In SMP configuration cores can be configured as Halt-on-reset
183 or they could all start at same time. For Halt-on-reset, non
195 This IP block enables SMP in ARC-HS38 cores.
196 It provides for cross-core interrupts, multi-core debug
211 This option specifies "N", with Line-len = 2 power N
228 This can be used to over-ride the global I/D Cache Enable on a
229 per-page basis (but only for pages accessed via MMU such as
231 TLB entries have a per-page Cache Enable Bit.
276 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
324 # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
344 bool "Insn: SWAPE (endian-swap)"
361 Enable gcc to generate 64-bit load/store instructions
374 Depending on the configuration, CPU can contain accumulator reg-pair
403 DSP extension presence in HW, no support for DSP-enabled userspace
414 run DSP-enabled userspace applications
423 and AGU registers to run DSP-enabled userspace applications
430 On HS cores, taken interrupt auto saves the regfile on stack.
449 -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
450 -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
476 bool "Support for the 40-bit Physical Address Extension"
493 kernel-user gutter)
510 Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide
522 Metaware Debugger. This can come in handy for Linux-host communication
549 Enable paranoid checks and self-test of both ARC-specific and generic