Lines Matching +full:tri +full:- +full:state
1 .. SPDX-License-Identifier: GPL-2.0
4 Vector Extension Support for RISC-V Linux
8 order to support the use of the RISC-V Vector Extension.
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19 are not portable to non-Linux, nor non-RISC-V environments, so it is discourage
27 argument consists of two 2-bit enablement statuses and a bit for inheritance
30 Enablement status is a tri-state value each occupying 2-bit of space in
33 * :c:macro:`PR_RISCV_V_VSTATE_CTRL_DEFAULT`: Use the system-wide default
34 enablement status on execve(). The system-wide default setting can be
43 arg: The control argument is a 5-bit value consisting of 3 parts, and
64 then the enablement status will be decided by the system-wide
71 This setting persists across changes in the system-wide default value.
92 next execve() call and the inheritance bit are all OR-ed together.
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134 3. Vector Register State Across System Calls
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140 1: https://github.com/riscv/riscv-v-spec/blob/master/calling-convention.adoc