Lines Matching refs:FIFO
194 device HW queue (FIFO, mailboxes or whatever the implementation is)
335 the RXNE (RX FIFO Not Empty) bit is set. Frames are read one by one
336 until either no frame is left in the RX FIFO or the maximum work quota
344 in the first word of RX FIFO.
347 for the frame, and only if it succeeds, fetch the frame from FIFO;
349 correct ``skb``, we have to fetch the first work of FIFO. There are
359 #. Add option to peek into the FIFO instead of consuming the word.
372 a partial frame may stay in the FIFO for a prolonged time. Nonetheless,
373 there may be just one owner of the RX FIFO, and thus no one else should
400 SocketCAN, however, supports only one FIFO queue for outgoing
401 frames [6]_. The buffer priorities may be used to simulate the FIFO
406 pointers into the FIFO formed by the TX buffers to be able to determine
411 between FIFO full and FIFO empty – in this situation,
413 the FIFO is maintained, together with priority rotation, is depicted in
481 When a received frame does no more fit into the hardware RX FIFO in its
482 entirety, RX FIFO overrun flag (STATUS[DOR]) is set and Data Overrun