Lines Matching full:description

12 description:
43 description:
58 description:
83 - description: USB2/HS PHY
84 - description: USB3/SS PHY
99 description:
105 - description: Core
106 - description: Power management unit
112 description: Indicate if we don't want to enable USB2 HW LPM for host
117 description: Determines if platform is USB3 LPM capable
121 description: Indicate if we don't want to enable USB2 HW LPM for gadget
126 description:
132 description:
138 description: True when DWC3 was configured with LPM Erratum enabled
142 description: LPM NYET threshold
146 description: Set if we want to enable u2exit lfps quirk
150 description: Set if we enable P3 OK for U2/SS Inactive quirk
154 description:
159 description:
165 description: When set core will delay PHY power change from P0 to P1/P2/P3.
169 description: When set core will filter LFPS reception.
173 description:
179 description: When set core will set Tx de-emphasis value
183 description:
193 description: When set core will disable USB3 suspend phy
197 description: When set core will disable USB2 suspend phy
201 description:
207 description: Set if link entering into U1 needs to be disabled
211 description: Set if link entering into U2 needs to be disabled
215 description:
220 description:
226 description:
231 description: When set, disable u2mac linestate check during HS transmit
235 description:
240 description:
245 description:
251 description:
257 description:
262 description:
269 description:
277 description:
283 description: HIRD threshold
287 description:
294 description:
303 description:
314 description:
323 description:
332 description:
341 description:
350 description: Determines if the TX fifos can be dynamically resized depending
358 description: Specifies the max number of packets the txfifo resizing logic
366 description:
381 description:
387 description:
395 description: High Speed (HS) data bus.
399 description: Super Speed (SS) data bus.
403 description: