Lines Matching +full:rx +full:- +full:level +full:- +full:trig
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-pl022.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 - $ref: spi-controller.yaml#
14 - $ref: /schemas/arm/primecell.yaml#
23 - compatible
28 - const: arm,pl022
29 - const: arm,primecell
40 clock-names:
42 - const: sspclk
43 - const: apb_pclk
45 pl022,autosuspend-delay:
63 dma-names:
65 There must be at least one channel named "tx" for transmit and named "rx"
71 - const: rx
72 - const: tx
78 "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-f]+$":
87 - 0 # SPI
88 - 1 # Texas Instruments Synchronous Serial Frame Format
89 - 2 # Microwire (Half Duplex)
91 pl022,com-mode:
95 - 0 # interrupt mode
96 - 1 # polling mode
97 - 2 # DMA mode
100 pl022,rx-level-trig:
101 description: Rx FIFO watermark level
106 pl022,tx-level-trig:
107 description: Tx FIFO watermark level
112 pl022,ctrl-len:
113 description: Microwire interface - Control length
118 pl022,wait-state:
119 description: Microwire interface - Wait state
124 description: Microwire interface - Full/Half duplex
129 - compatible
130 - reg
131 - interrupts
136 - |
140 #address-cells = <1>;
141 #size-cells = <0>;
145 dma-names = "rx", "tx";
150 spi-max-frequency = <12000000>;
151 spi-cpol;
152 spi-cpha;
154 pl022,com-mode = <0x2>;
155 pl022,rx-level-trig = <0>;
156 pl022,tx-level-trig = <0>;
157 pl022,ctrl-len = <0x11>;
158 pl022,wait-state = <0>;