Lines Matching +full:general +full:- +full:purpose
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ricard Wanderlof <ricardw@axis.com>
18 - $ref: dai-common.yaml#
23 - ti,tlv320adc3001
24 - ti,tlv320adc3101
30 '#sound-dai-cells':
33 '#gpio-cells':
36 gpio-controller: true
38 reset-gpios:
46 ti,dmdin-gpio1:
49 - 0 # ADC3XXX_GPIO_DISABLED - I/O buffers powered down and not used
50 - 1 # ADC3XXX_GPIO_INPUT - Various non-GPIO input functions
51 - 2 # ADC3XXX_GPIO_GPI - General purpose input
52 - 3 # ADC3XXX_GPIO_GPO - General purpose output
53 - 4 # ADC3XXX_GPIO_CLKOUT - Clock source set in CLKOUT_MUX reg
54 - 5 # ADC3XXX_GPIO_INT1 - INT1 output
55 - 6 # ADC3XXX_GPIO_SECONDARY_BCLK - Codec interface secondary BCLK
56 - 7 # ADC3XXX_GPIO_SECONDARY_WCLK - Codec interface secondary WCLK
64 ti,dmclk-gpio2:
67 - 0 # ADC3XXX_GPIO_DISABLED - I/O buffers powered down and not used
68 - 1 # ADC3XXX_GPIO_INPUT - Various non-GPIO input functions
69 - 2 # ADC3XXX_GPIO_GPI - General purpose input
70 - 3 # ADC3XXX_GPIO_GPO - General purpose output
71 - 4 # ADC3XXX_GPIO_CLKOUT - Clock source set in CLKOUT_MUX reg
72 - 5 # ADC3XXX_GPIO_INT1 - INT1 output
73 - 6 # ADC3XXX_GPIO_SECONDARY_BCLK - Codec interface secondary BCLK
74 - 7 # ADC3XXX_GPIO_SECONDARY_WCLK - Codec interface secondary WCLK
85 ti,micbias1-vg:
88 - 0 # ADC3XXX_MICBIAS_OFF - Mic bias is powered down
89 - 1 # ADC3XXX_MICBIAS_2_0V - Mic bias is set to 2.0V
90 - 2 # ADC3XXX_MICBIAS_2_5V - Mic bias is set to 2.5V
91 - 3 # ADC3XXX_MICBIAS_AVDD - Mic bias is same as AVDD supply
96 ti,micbias2-vg:
99 - 0 # ADC3XXX_MICBIAS_OFF - Mic bias is powered down
100 - 1 # ADC3XXX_MICBIAS_2_0V - Mic bias is set to 2.0V
101 - 2 # ADC3XXX_MICBIAS_2_5V - Mic bias is set to 2.5V
102 - 3 # ADC3XXX_MICBIAS_AVDD - Mic bias is same as AVDD supply
108 - compatible
109 - reg
110 - clocks
115 - |
117 #include <dt-bindings/gpio/gpio.h>
118 #include <dt-bindings/sound/tlv320adc3xxx.h>
121 #address-cells = <1>;
122 #size-cells = <0>;
123 tlv320adc3101: audio-codec@18 {
126 reset-gpios = <&gpio_pc 3 GPIO_ACTIVE_LOW>;
128 gpio-controller;
129 #gpio-cells = <2>;
130 ti,dmdin-gpio1 = <ADC3XXX_GPIO_GPO>;
131 ti,micbias1-vg = <ADC3XXX_MICBIAS_AVDD>;
136 compatible = "fixed-clock";
137 #clock-cells = <0>;
138 clock-frequency = <24576000>;