Lines Matching +full:sysreg +full:- +full:phandle

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Sam Protsenko <semen.protsenko@linaro.org>
11   - Krzysztof Kozlowski <krzk@kernel.org>
14   USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
17   child nodes, each representing a serial sub-node device. The mode setting
22     pattern: "^usi@[0-9a-f]+$"
26       - items:
27           - const: samsung,exynosautov9-usi
28           - const: samsung,exynos850-usi
29       - enum:
30           - samsung,exynos850-usi
36   clock-names: true
40   "#address-cells":
43   "#size-cells":
46   samsung,sysreg:
47     $ref: /schemas/types.yaml#/definitions/phandle-array
49       - items:
50           - description: phandle to System Register syscon node
51           - description: offset of SW_CONF register for this USI controller
53       Should be phandle/offset pair. The phandle to System Register syscon node
61       <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.
63   samsung,clkreq-on:
69       multi-master mode. Usually this property is needed if USI mode is set
75   "^i2c@[0-9a-f]+$":
76     $ref: /schemas/i2c/i2c-exynos5.yaml
79   "^serial@[0-9a-f]+$":
83   "^spi@[0-9a-f]+$":
88   - compatible
89   - ranges
90   - "#address-cells"
91   - "#size-cells"
92   - samsung,sysreg
93   - samsung,mode
100           - samsung,exynos850-usi
109         - description: Bus (APB) clock
110         - description: Operating clock for UART/SPI/I2C protocol
112     clock-names:
114         - const: pclk
115         - const: ipclk
118     - reg
119     - clocks
120     - clock-names
126     clock-names: false
127     samsung,clkreq-on: false
132   - |
133     #include <dt-bindings/interrupt-controller/arm-gic.h>
134     #include <dt-bindings/soc/samsung,exynos-usi.h>
137         compatible = "samsung,exynos850-usi";
139         samsung,sysreg = <&sysreg_peri 0x1010>;
141         samsung,clkreq-on; /* needed for UART mode */
142         #address-cells = <1>;
143         #size-cells = <1>;
146         clock-names = "pclk", "ipclk";
149             compatible = "samsung,exynos850-uart";
153             clock-names = "uart", "clk_uart_baud0";
158             compatible = "samsung,exynosautov9-hsi2c";
161             #address-cells = <1>;
162             #size-cells = <0>;
164             clock-names = "hsi2c", "hsi2c_pclk";