Lines Matching +full:r9a09g011 +full:- +full:pwc
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/renesas/renesas,rzv2m-pwc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/V2M External Power Sequence Controller (PWC)
10 The PWC IP found in the RZ/V2M family of chips comes with the below
12 - external power supply on/off sequence generation
13 - on/off signal generation for the LPDDR4 core power supply (LPVDD)
14 - key input signals processing
15 - general-purpose output pins
18 - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
23 - enum:
24 - renesas,r9a09g011-pwc # RZ/V2M
25 - renesas,r9a09g055-pwc # RZ/V2MA
26 - const: renesas,rzv2m-pwc
31 gpio-controller: true
33 '#gpio-cells':
36 renesas,rzv2m-pwc-power:
37 description: The PWC is used to control the system power supplies.
41 - compatible
42 - reg
43 - gpio-controller
44 - '#gpio-cells'
49 - |
50 pwc: pwc@a3700000 {
51 compatible = "renesas,r9a09g011-pwc", "renesas,rzv2m-pwc";
53 gpio-controller;
54 #gpio-cells = <2>;
55 renesas,rzv2m-pwc-power;