Lines Matching +full:reserved +full:- +full:memory
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The OMAP family of SoCs usually have one or more slave processor sub-systems
14 that are used to offload some of the processor-intensive tasks, or to manage
17 The processor cores in the sub-system are usually behind an IOMMU, and may
18 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2
21 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor
22 sub-system. The DSP processor sub-system can contain any of the TI's C64x,
24 sub-system usually contains either a Dual-Core Cortex-M3 or Dual-Core
25 Cortex-M4 processors.
27 Each remote processor sub-system is represented as a single DT node. Each node
35 memory on the board, or configuration used within the corresponding firmware
36 image. Examples of variable properties include 'mboxes', 'memory-region',
37 'timers', 'watchdog-timers' etc.
42 - ti,omap4-dsp
43 - ti,omap5-dsp
44 - ti,dra7-dsp
45 - ti,omap4-ipu
46 - ti,omap5-ipu
47 - ti,dra7-ipu
54 for this remote processor to access any external RAM memory or
57 cases where the sub-system has different ports for different
58 sub-modules within the processor sub-system (eg: DRA7 DSPs),
65 OMAP Mailbox specifier denoting the sub-mailbox, to be used for
68 Documentation/devicetree/bindings/mailbox/ti,omap-mailbox.yaml
69 This property should match with the sub-mailbox node used in
83 firmware-name:
88 # --------------------
95 memory-region:
98 phandle to the reserved memory node to be associated
99 with the remoteproc device. The reserved memory node
100 can be a CMA memory node, and should be defined as
102 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
108 'reg-names'. These are mandatory for all DSP and IPU
112 reg-names:
117 internal RAM memory region.
120 - const: l2ram
121 - const: l1pram
122 - const: l1dram
125 $ref: /schemas/types.yaml#/definitions/phandle-array
127 - items:
128 - description: phandle to the System Control Configuration region
129 - description: register offset of the boot address register
130 - description: the bit shift within the register
135 ti,autosuspend-delay-ms:
143 $ref: /schemas/types.yaml#/definitions/phandle-array
150 processor sub-system is running in SMP mode, or one per
151 core in the processor sub-system. This can also be used
160 ti,watchdog-timers:
161 $ref: /schemas/types.yaml#/definitions/phandle-array
168 if the processor sub-system is running a SMP OS.
177 - ti,dra7-dsp
184 - reg
185 - reg-names
186 - ti,bootreg
193 - ti,omap4-ipu
194 - ti,omap5-ipu
195 - ti,dra7-ipu
203 - reg
204 - reg-names
210 - ti,bootreg
213 - compatible
214 - iommus
215 - mboxes
216 - clocks
217 - resets
218 - firmware-name
223 - |
227 /* DSP Reserved Memory node */
228 #include <dt-bindings/clock/omap4.h>
229 reserved-memory {
230 #address-cells = <1>;
231 #size-cells = <1>;
233 dsp_memory_region: dsp-memory@98000000 {
234 compatible = "shared-dma-pool";
243 compatible = "ti,omap4-dsp";
247 memory-region = <&dsp_memory_region>;
249 ti,watchdog-timers = <&timer6>;
252 firmware-name = "omap4-dsp-fw.xe64T";
256 - |+
260 /* IPU Reserved Memory node */
261 #include <dt-bindings/clock/omap5.h>
262 reserved-memory {
263 #address-cells = <2>;
264 #size-cells = <2>;
266 ipu_memory_region: ipu-memory@95800000 {
267 compatible = "shared-dma-pool";
275 #address-cells = <1>;
276 #size-cells = <1>;
279 compatible = "ti,omap5-ipu";
281 reg-names = "l2ram";
284 memory-region = <&ipu_memory_region>;
286 ti,watchdog-timers = <&timer9>, <&timer11>;
289 firmware-name = "omap5-ipu-fw.xem4";
293 - |+
297 /* DSP1 Reserved Memory node */
298 #include <dt-bindings/clock/dra7.h>
299 reserved-memory {
300 #address-cells = <2>;
301 #size-cells = <2>;
303 dsp1_memory_region: dsp1-memory@99000000 {
304 compatible = "shared-dma-pool";
312 #address-cells = <1>;
313 #size-cells = <1>;
316 compatible = "ti,dra7-dsp";
320 reg-names = "l2ram", "l1pram", "l1dram";
324 memory-region = <&dsp1_memory_region>;
326 ti,watchdog-timers = <&timer10>;
329 firmware-name = "dra7-dsp1-fw.xe66";