Lines Matching +full:drive +full:- +full:push +full:- +full:pull
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre TORGUE <alexandre.torgue@foss.st.com>
17 on-chip controllers onto these pads.
22 - st,stm32f429-pinctrl
23 - st,stm32f469-pinctrl
24 - st,stm32f746-pinctrl
25 - st,stm32f769-pinctrl
26 - st,stm32h743-pinctrl
27 - st,stm32mp135-pinctrl
28 - st,stm32mp157-pinctrl
29 - st,stm32mp157-z-pinctrl
30 - st,stm32mp257-pinctrl
31 - st,stm32mp257-z-pinctrl
33 '#address-cells':
35 '#size-cells':
39 pins-are-numbered:
49 $ref: /schemas/types.yaml#/definitions/phandle-array
51 - items:
52 - description: syscon node which includes IRQ mux selection
53 - description: The offset of the IRQ mux selection register
54 - description: The field mask of IRQ mux, needed if different of 0xf
59 More details in include/dt-bindings/pinctrl/stm32-pinfunc.h
64 '^gpio@[0-9a-f]*$':
68 gpio-controller: true
69 '#gpio-cells':
71 interrupt-controller: true
72 '#interrupt-cells':
81 gpio-line-names: true
82 gpio-ranges:
91 st,bank-name:
96 - GPIOA
97 - GPIOB
98 - GPIOC
99 - GPIOD
100 - GPIOE
101 - GPIOF
102 - GPIOG
103 - GPIOH
104 - GPIOI
105 - GPIOJ
106 - GPIOK
107 - GPIOZ
109 st,bank-ioport:
118 "^(.+-hog(-[0-9]+)?)$":
121 - gpio-hog
124 - gpio-controller
125 - '#gpio-cells'
126 - reg
127 - clocks
128 - st,bank-name
130 '-[0-9]*$':
142 configuration, pullups, drive, output high/low and output speed.
145 $ref: /schemas/types.yaml#/definitions/uint32-array
149 defined in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
152 - port: The gpio port index (PA = 0, PB = 1, ..., PK = 11)
153 - line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
154 - function: The function number, can be:
164 - include/dt-bindings/pinctrl/stm32-pinfunc.h
179 bias-disable:
181 bias-pull-down:
183 bias-pull-up:
185 drive-push-pull:
187 drive-open-drain:
189 output-low:
191 output-high:
193 slew-rate:
203 - pinmux
206 - $ref: pinctrl.yaml#
209 - compatible
210 - '#address-cells'
211 - '#size-cells'
212 - ranges
217 - |
218 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
219 #include <dt-bindings/mfd/stm32f4-rcc.h>
222 #address-cells = <1>;
223 #size-cells = <1>;
224 compatible = "st,stm32f429-pinctrl";
228 gpio-controller;
229 #gpio-cells = <2>;
233 st,bank-name = "GPIOA";
237 //Example 2 (using gpio-ranges)
239 #address-cells = <1>;
240 #size-cells = <1>;
241 compatible = "st,stm32f429-pinctrl";
245 gpio-controller;
246 #gpio-cells = <2>;
250 st,bank-name = "GPIOB";
251 gpio-ranges = <&pinctrl 0 0 16>;
255 gpio-controller;
256 #gpio-cells = <2>;
260 st,bank-name = "GPIOC";
262 gpio-ranges = <&pinctrl 0 16 3>,
269 usart1_pins_a: usart1-0 {
272 bias-disable;
273 drive-push-pull;
274 slew-rate = <0>;
278 bias-disable;
284 pinctrl-0 = <&usart1_pins_a>;
285 pinctrl-names = "default";