Lines Matching +full:0 +full:x10001000
27 - cell 0 specifies the bus and device numbers of the root port:
30 - cell 1 denotes the upper 32 address bits and should be 0
45 - 0x81000000: I/O memory region
46 - 0x82000000: non-prefetchable memory region
47 - 0xc2000000: prefetchable memory region
73 - pinctrl-0: phandle for the default/active state of pin configurations.
104 - If lanes 0 to 3 are used:
150 - Root port 0 uses 4 lanes, root port 1 is unused.
158 "pcie-N": where N ranges from 0 to the value specified in nvidia,num-lanes.
171 reg = <0x80003000 0x00000800 /* PADS registers */
172 0x80003800 0x00000200 /* AFI registers */
173 0x90000000 0x10000000>; /* configuration space */
175 interrupts = <0 98 0x04 /* controller interrupt */
176 0 99 0x04>; /* MSI interrupt */
180 interrupt-map-mask = <0 0 0 0>;
181 interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
183 bus-range = <0x00 0xff>;
187 ranges = <0x82000000 0 0x80000000 0x80000000 0 0x00001000 /* port 0 registers */
188 0x82000000 0 0x80001000 0x80001000 0 0x00001000 /* port 1 registers */
189 0x81000000 0 0 0x82000000 0 0x00010000 /* downstream I/O */
190 0x82000000 0 0xa0000000 0xa0000000 0 0x10000000 /* non-prefetchable memory */
191 0xc2000000 0 0xb0000000 0xb0000000 0 0x10000000>; /* prefetchable memory */
199 pci@1,0 {
201 assigned-addresses = <0x82000800 0 0x80000000 0 0x1000>;
202 reg = <0x000800 0 0 0 0>;
213 pci@2,0 {
215 assigned-addresses = <0x82001000 0 0x80001000 0 0x1000>;
216 reg = <0x001000 0 0 0 0>;
237 pci@1,0 {
241 pci@0,0 {
242 reg = <0x010000 0 0 0 0>;
250 pci@0,0 {
251 reg = <0x020000 0 0 0 0>;
272 reg = <0x00003000 0x00000800 /* PADS registers */
273 0x00003800 0x00000200 /* AFI registers */
274 0x10000000 0x10000000>; /* configuration space */
281 interrupt-map-mask = <0 0 0 0>;
282 interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
284 bus-range = <0x00 0xff>;
288 ranges = <0x82000000 0 0x00000000 0x00000000 0 0x00001000 /* port 0 configuration space */
289 0x82000000 0 0x00001000 0x00001000 0 0x00001000 /* port 1 configuration space */
290 0x82000000 0 0x00004000 0x00004000 0 0x00001000 /* port 2 configuration space */
291 0x81000000 0 0 0x02000000 0 0x00010000 /* downstream I/O */
292 0x82000000 0 0x20000000 0x20000000 0 0x08000000 /* non-prefetchable memory */
293 0xc2000000 0 0x28000000 0x28000000 0 0x18000000>; /* prefetchable memory */
306 pci@1,0 {
308 assigned-addresses = <0x82000800 0 0x00000000 0 0x1000>;
309 reg = <0x000800 0 0 0 0>;
319 pci@2,0 {
321 assigned-addresses = <0x82001000 0 0x00001000 0 0x1000>;
322 reg = <0x001000 0 0 0 0>;
332 pci@3,0 {
334 assigned-addresses = <0x82001800 0 0x00004000 0 0x1000>;
335 reg = <0x001800 0 0 0 0>;
360 pci@1,0 {
364 pci@3,0 {
377 reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
378 0x0 0x01003800 0x0 0x00000800 /* AFI registers */
379 0x0 0x02000000 0x0 0x10000000>; /* configuration space */
386 interrupt-map-mask = <0 0 0 0>;
387 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
389 bus-range = <0x00 0xff>;
393 ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000 /* port 0 configuration space */
394 0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000 /* port 1 configuration space */
395 0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */
396 0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */
397 0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */
410 pci@1,0 {
412 assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
413 reg = <0x000800 0 0 0 0>;
423 pci@2,0 {
425 assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>;
426 reg = <0x001000 0 0 0 0>;
451 pci@1,0 {
453 phy-names = "pcie-0";
458 pci@2,0 {
460 phy-names = "pcie-0";
473 reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
474 0x0 0x01003800 0x0 0x00000800 /* AFI registers */
475 0x0 0x02000000 0x0 0x10000000>; /* configuration space */
482 interrupt-map-mask = <0 0 0 0>;
483 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
485 bus-range = <0x00 0xff>;
489 ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000 /* port 0 configuration space */
490 0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000 /* port 1 configuration space */
491 0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */
492 0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */
493 0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */
506 pci@1,0 {
508 assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
509 reg = <0x000800 0 0 0 0>;
519 pci@2,0 {
521 assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>;
522 reg = <0x001000 0 0 0 0>;
545 pci@1,0 {
546 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>,
550 phy-names = "pcie-0", "pcie-1", "pcie-2", "pcie-3";
554 pci@2,0 {
556 phy-names = "pcie-0";
570 reg = <0x0 0x10003000 0x0 0x00000800 /* PADS registers */
571 0x0 0x10003800 0x0 0x00000800 /* AFI registers */
572 0x0 0x40000000 0x0 0x10000000>; /* configuration space */
580 interrupt-map-mask = <0 0 0 0>;
581 interrupt-map = <0 0 0 0 &gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
583 bus-range = <0x00 0xff>;
587 ranges = <0x82000000 0 0x10000000 0x0 0x10000000 0 0x00001000 /* port 0 configuration space */
588 0x82000000 0 0x10001000 0x0 0x10001000 0 0x00001000 /* port 1 configuration space */
589 0x82000000 0 0x10004000 0x0 0x10004000 0 0x00001000 /* port 2 configuration space */
590 0x81000000 0 0x0 0x0 0x50000000 0 0x00010000 /* downstream I/O (64 KiB) */
591 0x82000000 0 0x50100000 0x0 0x50100000 0 0x07F00000 /* non-prefetchable memory (127 MiB) */
592 0xc2000000 0 0x58000000 0x0 0x58000000 0 0x28000000>; /* prefetchable memory (640 MiB) */
606 pci@1,0 {
608 assigned-addresses = <0x82000800 0 0x10000000 0 0x1000>;
609 reg = <0x000800 0 0 0 0>;
619 pci@2,0 {
621 assigned-addresses = <0x82001000 0 0x10001000 0 0x1000>;
622 reg = <0x001000 0 0 0 0>;
632 pci@3,0 {
634 assigned-addresses = <0x82001800 0 0x10004000 0 0x1000>;
635 reg = <0x001800 0 0 0 0>;
656 pci@1,0 {
661 pci@2,0 {
662 nvidia,num-lanes = <0>;
666 pci@3,0 {