Lines Matching +full:mdio +full:- +full:connected
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/xlnx,axi-ethernet.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
22 - Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
27 - xlnx,axi-ethernet-1.00.a
28 - xlnx,axi-ethernet-1.01.a
29 - xlnx,axi-ethernet-2.01.a
35 axistream-connected is specified, in which case the reg
41 - description: Ethernet core interrupt
42 - description: Tx DMA interrupt
43 - description: Rx DMA interrupt
45 Ethernet core interrupt is optional. If axistream-connected property is
50 phy-handle: true
57 phy-mode:
59 - mii
60 - gmii
61 - rgmii
62 - sgmii
63 - 1000BaseX
65 xlnx,phy-type:
67 Do not use, but still accepted in preference to phy-mode.
87 xlnx,switch-x-sgmii:
91 SGMII modes. If set, the phy-mode should be set to match the mode
96 - description: Clock for AXI register slave interface.
97 - description: AXI4-Stream clock for TXD RXD TXC and RXS interfaces.
98 - description: Ethernet reference clock, used by signal delay primitives
100 - description: MGT reference clock (used by optional internal PCS/PMA PHY)
102 clock-names:
104 - const: s_axi_lite_clk
105 - const: axis_clk
106 - const: ref_clk
107 - const: mgt_clk
109 axistream-connected:
112 used by this device. If this is specified, the DMA-related resources
116 mdio:
119 pcs-handle:
120 description: Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X
121 modes, where "pcs-handle" should be used to point to the PCS/PMA PHY,
122 and "phy-handle" should point to an external PHY if exists.
126 - compatible
127 - interrupts
128 - reg
129 - xlnx,rxmem
130 - phy-handle
133 - $ref: /schemas/net/ethernet-controller.yaml#
138 - |
140 compatible = "xlnx,axi-ethernet-1.00.a";
142 clock-names = "s_axi_lite_clk", "axis_clk", "ref_clk", "mgt_clk";
144 phy-mode = "mii";
149 phy-handle = <&phy0>;
151 mdio {
152 #address-cells = <1>;
153 #size-cells = <0>;
154 phy0: ethernet-phy@1 {
155 device_type = "ethernet-phy";
161 - |
163 compatible = "xlnx,axi-ethernet-1.00.a";
165 clock-names = "s_axi_lite_clk", "axis_clk", "ref_clk", "mgt_clk";
167 phy-mode = "mii";
172 phy-handle = <&phy1>;
173 axistream-connected = <&dma>;
175 mdio {
176 #address-cells = <1>;
177 #size-cells = <0>;
178 phy1: ethernet-phy@1 {
179 device_type = "ethernet-phy";