Lines Matching +full:reset +full:- +full:gpio

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Landen Chao <Landen.Chao@mediatek.com>
12 - DENG Qingfang <dqfext@gmail.com>
13 - Sean Wang <sean.wang@mediatek.com>
14 - Daniel Golle <daniel@makrotopia.org>
17 There are three versions of MT7530, standalone, in a multi-chip module and
18 built-into a SoC.
20 MT7530 is a part of the multi-chip module in MT7620AN, MT7620DA, MT7620DAN,
23 The MT7988 SoC comes with a built-in switch similar to MT7531 as well as four
26 CPU port and 4 user ports connected to the built-in Gigabit Ethernet PHYs.
36 - Port 5 can be used as a CPU port.
38 - PHY 0 or 4 of the switch can be muxed to gmac5 of the switch. Therefore,
43 The driver looks up the reg on the ethernet-phy node, which the phy-handle
46 The driver requires the gmac of the SoC to have "mediatek,eth-mac" as the
48 MediaTek SoC can benefit this. Banana Pi BPI-R2 suits this.
54 - For the multi-chip module MT7530, in case of an external phy wired to
63 - Port 5 can be wired to an external phy. Port 5 becomes a DSA slave.
65 For the multi-chip module MT7530, the external phy must be wired TX to TX
69 For the multi-chip module MT7530, muxing PHY 0 or 4 won't work when the
72 For the MT7621 SoCs, rgmii2 group must be claimed with gpio function.
79 - description:
80 Standalone MT7530 and multi-chip module MT7530 in MT7623AI SoC
83 - description:
87 - description:
88 Multi-chip module MT7530 in MT7621AT, MT7621DAT and MT7621ST SoCs
91 - description:
92 Built-in switch of the MT7988 SoC
93 const: mediatek,mt7988-switch
98 core-supply:
102 "#gpio-cells":
105 gpio-controller:
108 If defined, LED controller of the MT7530 switch will run on GPIO mode.
111 port 0 LED 0..2 as GPIO 0..2
112 port 1 LED 0..2 as GPIO 3..5
113 port 2 LED 0..2 as GPIO 6..8
114 port 3 LED 0..2 as GPIO 9..11
115 port 4 LED 0..2 as GPIO 12..14
117 "#interrupt-cells":
120 interrupt-controller: true
125 io-supply:
128 See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt for
135 switch is a part of the multi-chip module.
137 reset-gpios:
139 GPIO to reset the switch. Use this if mediatek,mcm is not used.
140 This property is optional because some boards share the reset line with
142 reset line is used.
145 reset-names:
150 Phandle pointing to the system reset controller with line index for the
155 "^(ethernet-)?ports$":
159 "^(ethernet-)?port@[0-9]+$":
169 - if:
175 - 5
176 - 6
179 - compatible
180 - reg
183 mt7530-dsa-port:
185 "^(ethernet-)?ports$":
187 "^(ethernet-)?port@[0-9]+$":
197 phy-mode:
199 - gmii
200 - mii
201 - rgmii
204 phy-mode:
206 - rgmii
207 - trgmii
209 mt7531-dsa-port:
211 "^(ethernet-)?ports$":
213 "^(ethernet-)?port@[0-9]+$":
223 phy-mode:
225 - 1000base-x
226 - 2500base-x
227 - rgmii
228 - sgmii
231 phy-mode:
233 - 1000base-x
234 - 2500base-x
235 - sgmii
238 - $ref: dsa.yaml#/$defs/ethernet-ports
239 - if:
241 - mediatek,mcm
244 reset-gpios: false
247 - resets
248 - reset-names
250 - dependencies:
251 interrupt-controller: [ interrupts ]
253 - if:
258 $ref: "#/$defs/mt7530-dsa-port"
260 - core-supply
261 - io-supply
263 - if:
268 $ref: "#/$defs/mt7531-dsa-port"
270 gpio-controller: false
273 - if:
278 $ref: "#/$defs/mt7530-dsa-port"
280 - mediatek,mcm
282 - if:
285 const: mediatek,mt7988-switch
287 $ref: "#/$defs/mt7530-dsa-port"
289 gpio-controller: false
291 reset-names: false
297 - |
298 #include <dt-bindings/gpio/gpio.h>
301 #address-cells = <1>;
302 #size-cells = <0>;
308 reset-gpios = <&pio 33 0>;
310 core-supply = <&mt6323_vpa_reg>;
311 io-supply = <&mt6323_vemc3v3_reg>;
313 ethernet-ports {
314 #address-cells = <1>;
315 #size-cells = <0>;
345 phy-mode = "rgmii";
347 fixed-link {
349 full-duplex;
358 - |
359 #include <dt-bindings/reset/mt2701-resets.h>
362 #address-cells = <1>;
363 #size-cells = <0>;
371 reset-names = "mcm";
373 core-supply = <&mt6323_vpa_reg>;
374 io-supply = <&mt6323_vemc3v3_reg>;
376 ethernet-ports {
377 #address-cells = <1>;
378 #size-cells = <0>;
408 phy-mode = "trgmii";
410 fixed-link {
412 full-duplex;
421 - |
422 #include <dt-bindings/gpio/gpio.h>
423 #include <dt-bindings/interrupt-controller/irq.h>
426 #address-cells = <1>;
427 #size-cells = <0>;
433 reset-gpios = <&pio 54 0>;
435 interrupt-controller;
436 #interrupt-cells = <1>;
437 interrupt-parent = <&pio>;
440 ethernet-ports {
441 #address-cells = <1>;
442 #size-cells = <0>;
472 phy-mode = "2500base-x";
474 fixed-link {
476 full-duplex;
485 - |
486 #include <dt-bindings/interrupt-controller/mips-gic.h>
487 #include <dt-bindings/reset/mt7621-reset.h>
490 #address-cells = <1>;
491 #size-cells = <0>;
499 reset-names = "mcm";
501 interrupt-controller;
502 #interrupt-cells = <1>;
503 interrupt-parent = <&gic>;
506 ethernet-ports {
507 #address-cells = <1>;
508 #size-cells = <0>;
538 phy-mode = "trgmii";
540 fixed-link {
542 full-duplex;
551 - |
552 #include <dt-bindings/interrupt-controller/mips-gic.h>
553 #include <dt-bindings/reset/mt7621-reset.h>
556 #address-cells = <1>;
557 #size-cells = <0>;
559 pinctrl-names = "default";
560 pinctrl-0 = <&rgmii2_pins>;
563 compatible = "mediatek,eth-mac";
566 phy-mode = "rgmii";
567 phy-handle = <&example5_ethphy4>;
571 #address-cells = <1>;
572 #size-cells = <0>;
575 example5_ethphy4: ethernet-phy@4 {
585 reset-names = "mcm";
587 interrupt-controller;
588 #interrupt-cells = <1>;
589 interrupt-parent = <&gic>;
592 ethernet-ports {
593 #address-cells = <1>;
594 #size-cells = <0>;
626 phy-mode = "trgmii";
628 fixed-link {
630 full-duplex;
640 - |
641 #include <dt-bindings/interrupt-controller/mips-gic.h>
642 #include <dt-bindings/reset/mt7621-reset.h>
645 #address-cells = <1>;
646 #size-cells = <0>;
648 pinctrl-names = "default";
649 pinctrl-0 = <&rgmii2_pins>;
652 compatible = "mediatek,eth-mac";
655 phy-mode = "rgmii";
656 phy-handle = <&example6_ethphy7>;
660 #address-cells = <1>;
661 #size-cells = <0>;
664 example6_ethphy7: ethernet-phy@7 {
666 phy-mode = "rgmii";
675 reset-names = "mcm";
677 interrupt-controller;
678 #interrupt-cells = <1>;
679 interrupt-parent = <&gic>;
682 ethernet-ports {
683 #address-cells = <1>;
684 #size-cells = <0>;
714 phy-mode = "trgmii";
716 fixed-link {
718 full-duplex;
728 - |
729 #include <dt-bindings/interrupt-controller/mips-gic.h>
730 #include <dt-bindings/reset/mt7621-reset.h>
733 #address-cells = <1>;
734 #size-cells = <0>;
736 pinctrl-names = "default";
737 pinctrl-0 = <&rgmii2_pins>;
740 #address-cells = <1>;
741 #size-cells = <0>;
744 example7_ethphy7: ethernet-phy@7 {
746 phy-mode = "rgmii";
755 reset-names = "mcm";
757 interrupt-controller;
758 #interrupt-cells = <1>;
759 interrupt-parent = <&gic>;
762 ethernet-ports {
763 #address-cells = <1>;
764 #size-cells = <0>;
794 phy-mode = "rgmii-txid";
795 phy-handle = <&example7_ethphy7>;
801 phy-mode = "trgmii";
803 fixed-link {
805 full-duplex;