Lines Matching +full:nand +full:- +full:ecc +full:- +full:engine

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/nand-chip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NAND Chip Common Properties
10   - Miquel Raynal <miquel.raynal@bootlin.com>
13   - $ref: mtd.yaml#
16   This file covers the generic description of a NAND chip. It implies that the
17   bus interface should not be taken into account: both raw NAND devices and
18   SPI-NAND devices are concerned by this description.
23       Contains the chip-select IDs.
25   nand-ecc-engine:
27       A phandle on the hardware ECC engine if any. There are
29       1/ The ECC engine is part of the NAND controller, in this
31       2/ The ECC engine is part of the NAND part (on-die), in this
33       3/ The ECC engine is external, in this case the phandle should
34       reference the specific ECC engine node.
37   nand-use-soft-ecc-engine:
38     description: Use a software ECC engine.
41   nand-no-ecc-engine:
42     description: Do not use any ECC correction.
45   nand-ecc-algo:
47       Desired ECC algorithm.
51   nand-ecc-strength:
53       Maximum number of bits that can be corrected per ECC step.
57   nand-ecc-step-size:
59       Number of data bytes covered by a single ECC step.
63   secure-regions:
65       Regions in the NAND chip which are protected using a secure element
68     $ref: /schemas/types.yaml#/definitions/uint64-matrix
71   - reg
73 # This file can be referenced by more specific devices (like spi-nands)