Lines Matching +full:nand +full:- +full:ecc +full:- +full:engine
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/mediatek,nand-ecc-engine.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek(MTK) SoCs NAND ECC engine
10 - Xiangsheng Hou <xiangsheng.hou@mediatek.com>
13 MTK NAND ECC engine can cowork with MTK raw NAND and SPI NAND controller.
18 - mediatek,mt2701-ecc
19 - mediatek,mt2712-ecc
20 - mediatek,mt7622-ecc
21 - mediatek,mt7986-ecc
25 - description: Base physical address and size of ECC.
29 - description: ECC interrupt
34 clock-names:
38 - compatible
39 - reg
40 - interrupts
41 - clocks
42 - clock-names
47 - |
48 #include <dt-bindings/clock/mt2701-clk.h>
49 #include <dt-bindings/interrupt-controller/arm-gic.h>
50 #include <dt-bindings/interrupt-controller/irq.h>
53 #address-cells = <2>;
54 #size-cells = <2>;
56 bch: ecc@1100e000 {
57 compatible = "mediatek,mt2701-ecc";
61 clock-names = "nfiecc_clk";