Lines Matching +full:nand +full:- +full:ecc +full:- +full:engine
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/mediatek,mtk-nfc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek(MTK) SoCs raw NAND FLASH controller (NFC)
10 - Xiangsheng Hou <xiangsheng.hou@mediatek.com>
15 - mediatek,mt2701-nfc
16 - mediatek,mt2712-nfc
17 - mediatek,mt7622-nfc
21 - description: Base physical address and size of NFI.
25 - description: NFI interrupt
29 - description: clock used for the controller
30 - description: clock used for the pad
32 clock-names:
34 - const: nfi_clk
35 - const: pad_clk
37 ecc-engine:
38 description: device-tree node of the required ECC engine.
42 "^nand@[a-f0-9]$":
43 $ref: raw-nand-chip.yaml#
48 nand-ecc-mode:
52 - $ref: nand-controller.yaml#
54 - if:
58 const: mediatek,mt2701-nfc
61 "^nand@[a-f0-9]$":
63 nand-ecc-step-size:
65 nand-ecc-strength:
69 - if:
73 const: mediatek,mt2712-nfc
76 "^nand@[a-f0-9]$":
78 nand-ecc-step-size:
80 nand-ecc-strength:
84 - if:
88 const: mediatek,mt7622-nfc
91 "^nand@[a-f0-9]$":
93 nand-ecc-step-size:
95 nand-ecc-strength:
99 - compatible
100 - reg
101 - interrupts
102 - clocks
103 - clock-names
104 - ecc-engine
109 - |
110 #include <dt-bindings/clock/mt2701-clk.h>
111 #include <dt-bindings/interrupt-controller/arm-gic.h>
112 #include <dt-bindings/interrupt-controller/irq.h>
115 #address-cells = <2>;
116 #size-cells = <2>;
118 nand-controller@1100d000 {
119 compatible = "mediatek,mt2701-nfc";
124 clock-names = "nfi_clk", "pad_clk";
125 ecc-engine = <&bch>;
126 #address-cells = <1>;
127 #size-cells = <0>;
129 nand@0 {
132 nand-on-flash-bbt;
133 nand-ecc-mode = "hw";
134 nand-ecc-step-size = <1024>;
135 nand-ecc-strength = <24>;
138 compatible = "fixed-partitions";
139 #address-cells = <1>;
140 #size-cells = <1>;
144 read-only;