Lines Matching +full:ecc +full:- +full:size
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/marvell,nand-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
15 - items:
16 - const: marvell,armada-8k-nand-controller
17 - const: marvell,armada370-nand-controller
18 - enum:
19 - marvell,ac5-nand-controller
20 - marvell,armada370-nand-controller
21 - marvell,pxa3xx-nand-controller
22 - description: legacy bindings
25 - marvell,armada-8k-nand
26 - marvell,armada370-nand
27 - marvell,pxa3xx-nand
42 clock-names:
45 - const: core
46 - const: reg
51 dma-names:
53 - const: data
55 marvell,system-controller:
60 "^nand@[a-f0-9]$":
62 $ref: raw-nand-chip.yaml
69 nand-rb:
71 - minimum: 0
74 nand-ecc-step-size:
77 nand-ecc-strength:
80 nand-ecc-mode:
83 marvell,nand-keep-config:
90 marvell,nand-enable-arbiter:
100 - reg
101 - nand-rb
106 - compatible
107 - reg
108 - interrupts
109 - clocks
112 - $ref: nand-controller.yaml#
114 - if:
118 const: marvell,pxa3xx-nand-controller
121 - dmas
122 - dma-names
124 - if:
128 const: marvell,armada-8k-nand-controller
134 clock-names:
138 - marvell,system-controller
145 clock-names:
152 - |
153 #include <dt-bindings/interrupt-controller/arm-gic.h>
154 nand_controller: nand-controller@d0000 {
155 compatible = "marvell,armada370-nand-controller";
157 #address-cells = <1>;
158 #size-cells = <0>;
164 label = "main-storage";
165 nand-rb = <0>;
166 nand-ecc-mode = "hw";
167 marvell,nand-keep-config;
168 nand-on-flash-bbt;
169 nand-ecc-strength = <4>;
170 nand-ecc-step-size = <512>;
173 compatible = "fixed-partitions";
174 #address-cells = <1>;
175 #size-cells = <1>;
185 - |
186 cp0_nand_controller: nand-controller@720000 {
187 compatible = "marvell,armada-8k-nand-controller",
188 "marvell,armada370-nand-controller";
190 #address-cells = <1>;
191 #size-cells = <0>;
193 clock-names = "core", "reg";
196 marvell,system-controller = <&cp0_syscon0>;
200 label = "main-storage";
201 nand-rb = <0>;
202 nand-ecc-mode = "hw";
203 nand-ecc-strength = <8>;
204 nand-ecc-step-size = <512>;
208 - |
209 nand-controller@43100000 {
210 compatible = "marvell,pxa3xx-nand-controller";
214 clock-names = "core";
216 dma-names = "data";
217 #address-cells = <1>;
218 #size-cells = <0>;
221 nand-rb = <0>;
222 nand-ecc-mode = "hw";
223 marvell,nand-keep-config;