Lines Matching +full:signal +full:- +full:id
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/arm,pl18x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Ulf Hansson <ulf.hansson@linaro.org>
20 - $ref: /schemas/arm/primecell.yaml#
21 - $ref: mmc-controller.yaml#
29 - arm,pl180
30 - arm,pl181
31 - arm,pl18x
33 - compatible
38 - description: The first version of the block, simply called
41 - const: arm,pl180
42 - const: arm,primecell
43 - description: The improved version of the block, found in the
46 in the PrimeCell ID registers.
48 - const: arm,pl181
49 - const: arm,primecell
50 - description: Wildcard entry that will let the operating system
51 inspect the PrimeCell ID registers to determine which hardware
54 - const: arm,pl18x
55 - const: arm,primecell
56 - description: Entries for STMicroelectronics variant of PL18x.
58 - enum:
59 - st,stm32-sdmmc2
60 - st,stm32mp25-sdmmc2
61 - const: arm,pl18x
62 - const: arm,primecell
73 dma-names:
75 - items:
76 - const: tx
77 - const: rx
78 - items:
79 - const: rx
80 - const: tx
82 power-domains: true
89 layout should provide the PrimeCell ID registers so that the device can
99 only one interrupt may be provided. The interrupt-names property is
105 st,sig-dir-dat0:
107 description: ST Micro-specific property, bus signal direction pins used for
110 st,sig-dir-dat2:
112 description: ST Micro-specific property, bus signal direction pins used for
115 st,sig-dir-dat31:
117 description: ST Micro-specific property, bus signal direction pins used for
120 st,sig-dir-dat74:
122 description: ST Micro-specific property, bus signal direction pins used for
125 st,sig-dir-cmd:
127 description: ST Micro-specific property, CMD signal direction used for
130 st,sig-pin-fbclk:
132 description: ST Micro-specific property, feedback clock FBCLK signal pin
135 st,sig-dir:
137 description: ST Micro-specific property, signal direction polarity used for
140 st,neg-edge:
142 description: ST Micro-specific property, data and command phase relation,
145 st,use-ckin:
147 description: ST Micro-specific property, use CKIN pin from an external
151 st,cmd-gpios:
156 st,ck-gpios:
161 st,ckin-gpios:
167 st,cmd-gpios: [ "st,use-ckin" ]
168 st,ck-gpios: [ "st,use-ckin" ]
169 st,ckin-gpios: [ "st,use-ckin" ]
174 - compatible
175 - reg
176 - interrupts
179 - |
180 #include <dt-bindings/interrupt-controller/irq.h>
181 #include <dt-bindings/gpio/gpio.h>
186 interrupts-extended = <&vic 22 &sic 1>;
188 clock-names = "mclk", "apb_pclk";
191 - |
192 #include <dt-bindings/interrupt-controller/irq.h>
199 dma-names = "rx", "tx";
201 clock-names = "sdi", "apb_pclk";
202 max-frequency = <100000000>;
203 bus-width = <4>;
204 cap-sd-highspeed;
205 cap-mmc-highspeed;
206 cd-gpios = <&gpio2 31 0x4>;
207 st,sig-dir-dat0;
208 st,sig-dir-dat2;
209 st,sig-dir-cmd;
210 st,sig-pin-fbclk;
211 vmmc-supply = <&ab8500_ldo_aux3_reg>;
212 vqmmc-supply = <&vmmci>;
215 - |
220 clock-names = "mclk", "apb_pclk";
222 max-frequency = <400000>;
223 bus-width = <4>;
224 cap-mmc-highspeed;
225 cap-sd-highspeed;
226 full-pwr-cycle;
227 st,sig-dir-dat0;
228 st,sig-dir-dat2;
229 st,sig-dir-dat31;
230 st,sig-dir-cmd;
231 st,sig-pin-fbclk;
232 vmmc-supply = <&vmmc_regulator>;
235 - |
238 arm,primecell-periphid = <0x10153180>;
242 clock-names = "apb_pclk";
244 cap-sd-highspeed;
245 cap-mmc-highspeed;
246 max-frequency = <120000000>;