Lines Matching +full:0 +full:x03c00000

19     const: 0
122       port@0:
134           "^endpoint(@[0-9])$":
154       - port@0
382         reg = <0x01c0c000 0x1000>;
393         #clock-cells = <0>;
398             #size-cells = <0>;
400             port@0 {
402                 #size-cells = <0>;
403                 reg = <0>;
405                 endpoint@0 {
406                     reg = <0>;
418                 #size-cells = <0>;
454         reg = <0x01c0c000 0x1000>;
468         #clock-cells = <0>;
472             #size-cells = <0>;
474             port@0 {
476                 #size-cells = <0>;
477                 reg = <0>;
479                 endpoint@0 {
480                     reg = <0>;
492                 #size-cells = <0>;
529         reg = <0x03c00000 0x10000>;
536         #clock-cells = <0>;
540             #size-cells = <0>;
542             port@0 {
543                 reg = <0>;
579         reg = <0x01c0c000 0x1000>;
584         #clock-cells = <0>;
590             #size-cells = <0>;
592             port@0 {
594                 #size-cells = <0>;
595                 reg = <0>;
597                 endpoint@0 {
598                     reg = <0>;
634         reg = <0x01c73000 0x1000>;
636         clocks = <&ccu CLK_BUS_TCON_TV0>, <&tcon_top 0>;
643             #size-cells = <0>;
645             port@0 {
647                 #size-cells = <0>;
648                 reg = <0>;
650                 endpoint@0 {
651                     reg = <0>;
663                 #size-cells = <0>;