Lines Matching full:cmu_top

23   CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
25   derived from CMU_TOP.
87             - description: CMU_BUSMC bus clock (from CMU_TOP)
105             - description: CMU_CORE bus clock (from CMU_TOP)
123             - description: CMU_FSYS0 bus clock (from CMU_TOP)
124             - description: CMU_FSYS0 pcie clock (from CMU_TOP)
143             - description: CMU_FSYS1 bus clock (from CMU_TOP)
144             - description: CMU_FSYS1 mmc card clock (from CMU_TOP)
145             - description: CMU_FSYS1 usb clock (from CMU_TOP)
165             - description: CMU_FSYS2 bus clock (from CMU_TOP)
166             - description: UFS clock (from CMU_TOP)
167             - description: Ethernet clock (from CMU_TOP)
187             - description: CMU_PERIC0 bus clock (from CMU_TOP)
188             - description: PERIC0 IP clock (from CMU_TOP)
207             - description: CMU_PERIC1 bus clock (from CMU_TOP)
208             - description: PERIC1 IP clock (from CMU_TOP)
227             - description: CMU_PERIS bus clock (from CMU_TOP)
254                  <&cmu_top DOUT_CLKCMU_FSYS2_BUS>,
255                  <&cmu_top DOUT_CLKCMU_FSYS2_UFS_EMBD>,
256                  <&cmu_top DOUT_CLKCMU_FSYS2_ETHERNET>;