Lines Matching +full:- +full:clock
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynos5260-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos5260 SoC clock controller
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
13 - Tomasz Figa <tomasz.figa@gmail.com>
16 Expected external clocks, defined in DTS as fixed-rate clocks with a matching
18 - "fin_pll" - PLL input clock from XXTI
19 - "xrtcxti" - input clock from XRTCXTI
20 - "ioclk_pcm_extclk" - pcm external operation clock
21 - "ioclk_spdif_extclk" - spdif external operation clock
22 - "ioclk_i2s_cdclk" - i2s0 codec clock
26 are fed into the clock controller and then routed to the hardware blocks.
28 - "phyclk_dptx_phy_ch3_txd_clk" - dp phy clock for channel 3
29 - "phyclk_dptx_phy_ch2_txd_clk" - dp phy clock for channel 2
30 - "phyclk_dptx_phy_ch1_txd_clk" - dp phy clock for channel 1
31 - "phyclk_dptx_phy_ch0_txd_clk" - dp phy clock for channel 0
32 - "phyclk_hdmi_phy_tmds_clko" - hdmi phy tmds clock
33 - "phyclk_hdmi_phy_pixel_clko" - hdmi phy pixel clock
34 - "phyclk_hdmi_link_o_tmds_clkhi" - hdmi phy for hdmi link
35 - "phyclk_dptx_phy_o_ref_clk_24m" - dp phy reference clock
36 - "phyclk_dptx_phy_clk_div2"
37 - "phyclk_mipi_dphy_4l_m_rxclkesc0"
38 - "phyclk_usbhost20_phy_phyclock" - usb 2.0 phy clock
39 - "phyclk_usbhost20_phy_freeclk"
40 - "phyclk_usbhost20_phy_clk48mohci"
41 - "phyclk_usbdrd30_udrd30_pipe_pclk"
42 - "phyclk_usbdrd30_udrd30_phyclock" - usb 3.0 phy clock
45 include/dt-bindings/clock/exynos5260-clk.h header.
50 - samsung,exynos5260-clock-top
51 - samsung,exynos5260-clock-peri
52 - samsung,exynos5260-clock-egl
53 - samsung,exynos5260-clock-kfc
54 - samsung,exynos5260-clock-g2d
55 - samsung,exynos5260-clock-mif
56 - samsung,exynos5260-clock-mfc
57 - samsung,exynos5260-clock-g3d
58 - samsung,exynos5260-clock-fsys
59 - samsung,exynos5260-clock-aud
60 - samsung,exynos5260-clock-isp
61 - samsung,exynos5260-clock-gscl
62 - samsung,exynos5260-clock-disp
68 clock-names:
72 "#clock-cells":
79 - compatible
80 - "#clock-cells"
81 - reg
84 - if:
88 const: samsung,exynos5260-clock-top
94 clock-names:
96 - const: fin_pll
97 - const: dout_mem_pll
98 - const: dout_bus_pll
99 - const: dout_media_pll
101 - clock-names
102 - clocks
104 - if:
108 const: samsung,exynos5260-clock-peri
114 clock-names:
116 - const: fin_pll
117 - const: ioclk_pcm_extclk
118 - const: ioclk_i2s_cdclk
119 - const: ioclk_spdif_extclk
120 - const: phyclk_hdmi_phy_ref_cko
121 - const: dout_aclk_peri_66
122 - const: dout_sclk_peri_uart0
123 - const: dout_sclk_peri_uart1
124 - const: dout_sclk_peri_uart2
125 - const: dout_sclk_peri_spi0_b
126 - const: dout_sclk_peri_spi1_b
127 - const: dout_sclk_peri_spi2_b
128 - const: dout_aclk_peri_aud
130 - clock-names
131 - clocks
133 - if:
137 const: samsung,exynos5260-clock-egl
143 clock-names:
145 - const: fin_pll
146 - const: dout_bus_pll
148 - clock-names
149 - clocks
151 - if:
155 const: samsung,exynos5260-clock-kfc
161 clock-names:
163 - const: fin_pll
164 - const: dout_media_pll
166 - clock-names
167 - clocks
169 - if:
173 const: samsung,exynos5260-clock-g2d
179 clock-names:
181 - const: fin_pll
182 - const: dout_aclk_g2d_333
184 - clock-names
185 - clocks
187 - if:
191 const: samsung,exynos5260-clock-mif
197 clock-names:
199 - const: fin_pll
201 - clock-names
202 - clocks
204 - if:
208 const: samsung,exynos5260-clock-mfc
214 clock-names:
216 - const: fin_pll
217 - const: dout_aclk_mfc_333
219 - clock-names
220 - clocks
222 - if:
226 const: samsung,exynos5260-clock-g3d
232 clock-names:
234 - const: fin_pll
236 - clock-names
237 - clocks
239 - if:
243 const: samsung,exynos5260-clock-fsys
249 clock-names:
251 - const: fin_pll
252 - const: phyclk_usbhost20_phy_phyclock
253 - const: phyclk_usbhost20_phy_freeclk
254 - const: phyclk_usbhost20_phy_clk48mohci
255 - const: phyclk_usbdrd30_udrd30_pipe_pclk
256 - const: phyclk_usbdrd30_udrd30_phyclock
257 - const: dout_aclk_fsys_200
259 - clock-names
260 - clocks
262 - if:
266 const: samsung,exynos5260-clock-aud
272 clock-names:
274 - const: fin_pll
275 - const: fout_aud_pll
276 - const: ioclk_i2s_cdclk
277 - const: ioclk_pcm_extclk
279 - clock-names
280 - clocks
282 - if:
286 const: samsung,exynos5260-clock-isp
292 clock-names:
294 - const: fin_pll
295 - const: dout_aclk_isp1_266
296 - const: dout_aclk_isp1_400
297 - const: mout_aclk_isp1_266
300 - clock-names
301 - clocks
303 - if:
307 const: samsung,exynos5260-clock-gscl
313 clock-names:
315 - const: fin_pll
316 - const: dout_aclk_gscl_400
317 - const: dout_aclk_gscl_333
319 - clock-names
320 - clocks
322 - if:
326 const: samsung,exynos5260-clock-disp
332 clock-names:
334 - const: fin_pll
335 - const: phyclk_dptx_phy_ch3_txd_clk
336 - const: phyclk_dptx_phy_ch2_txd_clk
337 - const: phyclk_dptx_phy_ch1_txd_clk
338 - const: phyclk_dptx_phy_ch0_txd_clk
339 - const: phyclk_hdmi_phy_tmds_clko
340 - const: phyclk_hdmi_phy_ref_clko
341 - const: phyclk_hdmi_phy_pixel_clko
342 - const: phyclk_hdmi_link_o_tmds_clkhi
343 - const: phyclk_mipi_dphy_4l_m_txbyte_clkhs
344 - const: phyclk_dptx_phy_o_ref_clk_24m
345 - const: phyclk_dptx_phy_clk_div2
346 - const: phyclk_mipi_dphy_4l_m_rxclkesc0
347 - const: phyclk_hdmi_phy_ref_cko
348 - const: ioclk_spdif_extclk
349 - const: dout_aclk_peri_aud
350 - const: dout_aclk_disp_222
351 - const: dout_sclk_disp_pixel
352 - const: dout_aclk_disp_333
354 - clock-names
355 - clocks
360 - |
361 #include <dt-bindings/clock/exynos5260-clk.h>
363 fin_pll: clock {
364 compatible = "fixed-clock";
365 clock-output-names = "fin_pll";
366 #clock-cells = <0>;
367 clock-frequency = <24000000>;
370 clock-controller@10010000 {
371 compatible = "samsung,exynos5260-clock-top";
373 #clock-cells = <1>;
378 clock-names = "fin_pll",