Lines Matching +full:three +full:- +full:level
7 :Copyright: |copy| 2005-2010: Thomas Gleixner
8 :Copyright: |copy| 2005-2006: Ingo Molnar
29 __do_IRQ() super-handler, which is able to deal with every type of
36 - Level type
38 - Edge type
40 - Simple type
44 - Fast EOI type
46 In the SMP world of the __do_IRQ() super-handler another type was
49 - Per CPU type
51 This split implementation of high-level IRQ handlers allows us to
57 structures and their ``->ack``, ``->end`` [etc.] callbacks to differentiate
58 the flow control in the super-handler. This leads to a mix of flow logic
59 and low-level hardware logic, and it also leads to unnecessary code
61 ``ioapic_edge_irq`` IRQ-type which share many of the low-level details but
69 and only need to add the chip-level specific code. The separation is
71 IRQ flow itself but not in the chip details - and thus provides a more
74 Each interrupt descriptor is assigned its own high-level flow handler,
75 which is normally one of the generic implementations. (This high-level
82 IRQ-flow implementation for 'level type' interrupts and add a
86 of existing implementations, the __do_IRQ() super-handler is still
89 enables smaller and cleaner IRQ subsystems. It's deprecated for three
100 There are three main levels of abstraction in the interrupt code:
102 1. High-level driver API
104 2. High-level IRQ flow handlers
106 3. Chip-level hardware encapsulation
109 ----------------------
118 Whenever an interrupt triggers, the low-level architecture code calls
119 into the generic interrupt code by calling desc->handle_irq(). This
120 high-level IRQ handling function only uses desc->irq_data.chip
123 High-level Driver API
124 ---------------------
126 The high-level Driver API consists of following functions:
128 - request_irq()
130 - request_threaded_irq()
132 - free_irq()
134 - disable_irq()
136 - enable_irq()
138 - disable_irq_nosync() (SMP only)
140 - synchronize_irq() (SMP only)
142 - irq_set_irq_type()
144 - irq_set_irq_wake()
146 - irq_set_handler_data()
148 - irq_set_chip()
150 - irq_set_chip_data()
154 High-level IRQ flow handlers
155 ----------------------------
157 The generic layer provides a set of pre-defined irq-flow methods:
159 - handle_level_irq()
161 - handle_edge_irq()
163 - handle_fasteoi_irq()
165 - handle_simple_irq()
167 - handle_percpu_irq()
169 - handle_edge_eoi_irq()
171 - handle_bad_irq()
173 The interrupt flow handlers (either pre-defined or architecture
189 desc->irq_data.chip->irq_unmask(data);
195 desc->irq_data.chip->irq_mask(data);
200 chip->irq_ack(data);
205 if (chip->irq_mask_ack) {
206 chip->irq_mask_ack(data);
208 chip->irq_mask(data);
209 chip->irq_ack(data);
222 Default Level IRQ flow handler
225 handle_level_irq provides a generic implementation for level-triggered
230 desc->irq_data.chip->irq_mask_ack();
231 handle_irq_event(desc->action);
232 desc->irq_data.chip->irq_unmask();
243 handle_irq_event(desc->action);
244 desc->irq_data.chip->irq_eoi();
250 handle_edge_irq provides a generic implementation for edge-triggered
255 if (desc->status & running) {
256 desc->irq_data.chip->irq_mask_ack();
257 desc->status |= pending | masked;
260 desc->irq_data.chip->irq_ack();
261 desc->status |= running;
263 if (desc->status & masked)
264 desc->irq_data.chip->irq_unmask();
265 desc->status &= ~pending;
266 handle_irq_event(desc->action);
267 } while (desc->status & pending);
268 desc->status &= ~running;
283 handle_irq_event(desc->action);
297 if (desc->irq_data.chip->irq_ack)
298 desc->irq_data.chip->irq_ack();
299 handle_irq_event(desc->action);
300 if (desc->irq_data.chip->irq_eoi)
301 desc->irq_data.chip->irq_eoi();
321 which have no platform-specific IRQ handling quirks. If an architecture
322 needs to implement quirks on the 'flow' level then it can do so by
323 overriding the high-level irq-flow handler.
330 the hardware level when disable_irq() is called. The interrupt is kept
334 hardware level. When an interrupt arrives while the IRQ_DISABLED flag
335 is set, then the interrupt is masked at the hardware level and the
336 IRQ_PENDING bit is set. When the interrupt is re-enabled by
344 Chip-level hardware encapsulation
345 ---------------------------------
347 The chip-level hardware descriptor structure :c:type:`irq_chip` contains all
351 - ``irq_ack``
353 - ``irq_mask_ack`` - Optional, recommended for performance
355 - ``irq_mask``
357 - ``irq_unmask``
359 - ``irq_eoi`` - Optional, required for EOI flow handlers
361 - ``irq_retrigger`` - Optional
363 - ``irq_set_type`` - Optional
365 - ``irq_set_wake`` - Optional
369 handler(s) to use these basic units of low-level functionality.
379 edge/level/simple/percpu interrupts. This is not only a functional
386 chip primitives. The per-irq structure is protected via desc->lock, by
398 .. kernel-doc:: kernel/irq/generic-chip.c
407 .. kernel-doc:: include/linux/irq.h
410 .. kernel-doc:: include/linux/interrupt.h
419 .. kernel-doc:: kernel/irq/manage.c
421 .. kernel-doc:: kernel/irq/chip.c
430 .. kernel-doc:: kernel/irq/irqdesc.c
432 .. kernel-doc:: kernel/irq/handle.c
434 .. kernel-doc:: kernel/irq/chip.c