Lines Matching refs:L3
43 Enable code/data prioritization in L3 cache allocations.
50 L2 and L3 CDP are controlled separately.
74 Cache resource(L3/L2) subdirectory contains the following files
262 # echo L3:0=f7 > schemata
348 This contains a set of files organized by L3 domain and by
349 RDT event. E.g. on a system with two L3 domains there will
432 On current generation systems there is one L3 cache per socket and L2
434 isn't an architectural requirement. We could have multiple separate L3
482 This can occur when aggregate L2 external bandwidth is more than L3
485 240GBps) and L3 external bandwidth is 100GBps. Now a workload with '20
486 threads, having 50% bandwidth, each consuming 5GBps' consumes the max L3
490 has capacity, the L3 external bandwidth is fully used. Also note that
515 L3 schemata file details (code and data prioritization disabled)
517 With CDP disabled the L3 schemata format is::
519 L3:<cache_id0>=<cbm>;<cache_id1>=<cbm>;...
521 L3 schemata file details (CDP enabled via mount option to resctrl)
523 When CDP is enabled L3 control is split into two separate resources
545 Memory b/w domain is L3 cache.
553 Memory bandwidth domain is L3 cache.
571 The bandwidth domain for slow memory is L3 cache. Its schemata file
605 L3:0=ffff;1=ffff;2=ffff;3=ffff
610 L3:0=ffff;1=ffff;2=ffff;3=ffff
624 L3:0=ffff;1=ffff;2=ffff;3=ffff
630 L3:0=ffff;1=ffff;2=ffff;3=ffff
747 writing "3" to the pseudo_lock_measure file will trigger the L3 cache
818 On a two socket machine (one L3 cache per socket) with just four bits
826 # echo "L3:0=3;1=c\nMB:0=50;1=50" > /sys/fs/resctrl/p0/schemata
827 # echo "L3:0=3;1=3\nMB:0=50;1=50" > /sys/fs/resctrl/p1/schemata
830 of all caches (its schemata file reads "L3:0=f;1=f").
848 # echo "L3:0=3;1=c\nMB:0=1024;1=500" > /sys/fs/resctrl/p0/schemata
849 # echo "L3:0=3;1=3\nMB:0=1024;1=500" > /sys/fs/resctrl/p1/schemata
861 of L3 cache on socket 0.
868 50% of the L3 cache on socket 0 and 50% of memory b/w cannot be used by
871 # echo "L3:0=3ff;1=fffff\nMB:0=50;1=100" > schemata
878 # echo "L3:0=f8000;1=fffff" > p0/schemata
892 # echo "L3:0=7c00;1=fffff" > p1/schemata
896 For the same 2 socket system with memory b/w resource and CAT L3 the
903 # echo -e "L3:0=f8000;1=fffff\nMB:0=20;1=100" > p0/schemata
909 # echo -e "L3:0=f8000;1=fffff\nMB:0=20;1=100" > p0/schemata
916 with the kernel it's desired that the kernel on these cores shares L3 with
924 50% of the L3 cache on socket 0, and 50% of memory bandwidth on socket 0
927 # echo "L3:0=3ff\nMB:0=50" > schemata
935 # echo "L3:0=ffc00\nMB:0=50" > p0/schemata
1125 As an example, the allocation of an exclusive reservation of L3 cache
1245 On a two socket machine (one L3 cache per socket) with just four bits
1251 # echo "L3:0=3;1=c" > /sys/fs/resctrl/p0/schemata
1252 # echo "L3:0=3;1=3" > /sys/fs/resctrl/p1/schemata
1257 of all caches (its schemata file reads "L3:0=f;1=f").
1289 On a two socket machine (one L3 cache per socket)::