Lines Matching +full:left +full:- +full:aligned

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 #include <asm/ppc-opcode.h>
42 	std     r3,-STACKFRAMESIZE+STK_REG(R31)(r1); \
43 	std     r4,-STACKFRAMESIZE+STK_REG(R30)(r1); \
44 	std     r5,-STACKFRAMESIZE+STK_REG(R29)(r1); \
46 	stdu    r1,-STACKFRAMESIZE(r1); \
58 	std     r3,-STACKFRAMESIZE+STK_REG(R31)(r1); \
59 	std     r4,-STACKFRAMESIZE+STK_REG(R30)(r1); \
60 	std     r5,-STACKFRAMESIZE+STK_REG(R29)(r1); \
62 	stdu    r1,-STACKFRAMESIZE(r1); \
83  * _v1st_qw is the 1st aligned QW of current addr which is already loaded.
85  * _v2nd_qw is the 2nd aligned QW of cur _vaddr to be loaded.
110 	/* Fall back to short loop if compare at aligned addrs
159 	/* attempt to compare bytes not aligned with 8 bytes so that
164 	/* Try to compare the first double word which is not 8 bytes aligned:
165 	 * load the first double word at (src & ~7UL) and shift left appropriate
186 	/* now we are aligned with 8 bytes.
187 	 * Use .Llong loop if left cmp bytes are equal or greater than 32B.
193 	/* compare 1 ~ 31 bytes, at least r3 addr is 8 bytes aligned now */
215 	 * Here we have less than 8 bytes to compare. At least s1 is aligned to
219 	 * size. If we detect that case we go to the byte-by-byte loop.
224 	clrldi	r6,r4,(64-12)	// r6 = r4 & 0xfff
252 	/* At least s1 addr is aligned with 8 bytes */
257 	std	r31,-8(r1)
258 	std	r30,-16(r1)
259 	std	r29,-24(r1)
260 	std	r28,-32(r1)
261 	std	r27,-40(r1)
350 	ld	r31,-8(r1)
351 	ld	r30,-16(r1)
352 	ld	r29,-24(r1)
353 	ld	r28,-32(r1)
354 	ld	r27,-40(r1)
375 	li	r3,-1
381 	li	r3,-1
387 	li	r3,-1
393 	li	r3,-1
396 	ld	r31,-8(r1)
397 	ld	r30,-16(r1)
398 	ld	r29,-24(r1)
399 	ld	r28,-32(r1)
400 	ld	r27,-40(r1)
406 	li	r3,-1
430 	addi	r5,r5,-8
453 	addi	r5,r5,-8
531 	/* now s1 is aligned with 8 bytes. */
554 	/* perform a 32 bytes pre-checking before
566 	addi	r5,r5,-8
595 	/* now s1 is aligned with 16 bytes */