Lines Matching +full:6 +full:c
5 * Copyright (C) 2020, Red Hat, Inc.
59 #define for_each_sublist(c, s) \ argument
60 for ((s) = &(c)->sublists[0]; (s)->regs; ++(s))
77 static const char *config_name(struct vcpu_config *c) in config_name() argument
82 if (c->name) in config_name()
83 return c->name; in config_name()
85 for_each_sublist(c, s) in config_name()
88 c->name = malloc(len); in config_name()
91 for_each_sublist(c, s) { in config_name()
94 strcat(c->name + len, s->name); in config_name()
96 c->name[len - 1] = '+'; in config_name()
98 c->name[len - 1] = '\0'; in config_name()
100 return c->name; in config_name()
103 static bool has_cap(struct vcpu_config *c, long capability) in has_cap() argument
107 for_each_sublist(c, s) in has_cap()
154 static const char *core_id_to_str(struct vcpu_config *c, __u64 id) in core_id_to_str() argument
165 TEST_ASSERT(idx < 31, "%s: Unexpected regs.regs index: %lld", config_name(c), idx); in core_id_to_str()
180 TEST_ASSERT(idx < KVM_NR_SPSR, "%s: Unexpected spsr index: %lld", config_name(c), idx); in core_id_to_str()
185 TEST_ASSERT(idx < 32, "%s: Unexpected fp_regs.vregs index: %lld", config_name(c), idx); in core_id_to_str()
193 TEST_FAIL("%s: Unknown core reg id: 0x%llx", config_name(c), id); in core_id_to_str()
197 static const char *sve_id_to_str(struct vcpu_config *c, __u64 id) in sve_id_to_str() argument
207 TEST_ASSERT(i == 0, "%s: Currently we don't expect slice > 0, reg id 0x%llx", config_name(c), id); in sve_id_to_str()
214 "%s: Unexpected bits set in SVE ZREG id: 0x%llx", config_name(c), id); in sve_id_to_str()
220 "%s: Unexpected bits set in SVE PREG id: 0x%llx", config_name(c), id); in sve_id_to_str()
224 "%s: Unexpected bits set in SVE FFR id: 0x%llx", config_name(c), id); in sve_id_to_str()
231 static void print_reg(struct vcpu_config *c, __u64 id) in print_reg() argument
237 "%s: KVM_REG_ARM64 missing in reg id: 0x%llx", config_name(c), id); in print_reg()
269 config_name(c), (id & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT, id); in print_reg()
274 printf("\tKVM_REG_ARM64 | %s | KVM_REG_ARM_CORE | %s,\n", reg_size, core_id_to_str(c, id)); in print_reg()
278 "%s: Unexpected bits set in DEMUX reg id: 0x%llx", config_name(c), id); in print_reg()
289 "%s: Unexpected bits set in SYSREG reg id: 0x%llx", config_name(c), id); in print_reg()
294 "%s: Unexpected bits set in FW reg id: 0x%llx", config_name(c), id); in print_reg()
299 "%s: Unexpected bits set in the bitmap feature FW reg id: 0x%llx", config_name(c), id); in print_reg()
303 if (has_cap(c, KVM_CAP_ARM_SVE)) in print_reg()
304 printf("\t%s,\n", sve_id_to_str(c, id)); in print_reg()
306 …TEST_FAIL("%s: KVM_REG_ARM64_SVE is an unexpected coproc type in reg id: 0x%llx", config_name(c), … in print_reg()
310 config_name(c), (id & KVM_REG_ARM_COPROC_MASK) >> KVM_REG_ARM_COPROC_SHIFT, id); in print_reg()
371 static void prepare_vcpu_init(struct vcpu_config *c, struct kvm_vcpu_init *init) in prepare_vcpu_init() argument
375 for_each_sublist(c, s) in prepare_vcpu_init()
380 static void finalize_vcpu(struct kvm_vcpu *vcpu, struct vcpu_config *c) in finalize_vcpu() argument
385 for_each_sublist(c, s) { in finalize_vcpu()
393 static void check_supported(struct vcpu_config *c) in check_supported() argument
397 for_each_sublist(c, s) { in check_supported()
403 config_name(c), s->name); in check_supported()
411 static void run_test(struct vcpu_config *c) in run_test() argument
420 check_supported(c); in run_test()
423 prepare_vcpu_init(c, &init); in run_test()
426 finalize_vcpu(vcpu, c); in run_test()
439 print_reg(c, id); in run_test()
466 printf("%s: Failed to get ", config_name(c)); in run_test()
467 print_reg(c, reg.id); in run_test()
473 for_each_sublist(c, s) { in run_test()
478 printf("%s: Failed to reject (ret=%d, errno=%d) ", config_name(c), ret, errno); in run_test()
479 print_reg(c, reg.id); in run_test()
490 printf("%s: Failed to set ", config_name(c)); in run_test()
491 print_reg(c, reg.id); in run_test()
498 for_each_sublist(c, s) in run_test()
503 for_each_sublist(c, s) { in run_test()
519 printf("%s: Number blessed registers: %5lld\n", config_name(c), blessed_n); in run_test()
521 config_name(c), reg_list->n, reg_list->n - n); in run_test()
527 "list with the following lines:\n\n", config_name(c), new_regs); in run_test()
529 print_reg(c, reg_list->reg[i]); in run_test()
535 "The following lines are missing registers:\n\n", config_name(c), missing_regs); in run_test()
537 print_reg(c, blessed_reg[i]); in run_test()
544 config_name(c), missing_regs, failed_get, failed_set, failed_reject); in run_test()
546 pr_info("%s: PASS\n", config_name(c)); in run_test()
555 struct vcpu_config *c; in help() local
565 c = vcpu_configs[i]; in help()
567 " '%s'\n", config_name(c)); in help()
581 struct vcpu_config *c; in parse_config() local
588 c = vcpu_configs[i]; in parse_config()
589 if (strcmp(config_name(c), &config[9]) == 0) in parse_config()
596 return c; in parse_config()
601 struct vcpu_config *c, *sel = NULL; in main() local
629 c = vcpu_configs[i]; in main()
630 if (sel && c != sel) in main()
636 run_test(c); in main()
663 KVM_REG_ARM64 | KVM_REG_SIZE_U64 | KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(regs.regs[6]),
711 ARM64_SYS_REG(3, 0, 0, 0, 6), /* REVIDR_EL1 */
717 ARM64_SYS_REG(2, 0, 0, 0, 6),
721 ARM64_SYS_REG(2, 0, 0, 1, 6),
727 ARM64_SYS_REG(2, 0, 0, 2, 6),
731 ARM64_SYS_REG(2, 0, 0, 3, 6),
735 ARM64_SYS_REG(2, 0, 0, 4, 6),
739 ARM64_SYS_REG(2, 0, 0, 5, 6),
741 ARM64_SYS_REG(2, 0, 0, 6, 4),
742 ARM64_SYS_REG(2, 0, 0, 6, 5),
743 ARM64_SYS_REG(2, 0, 0, 6, 6),
744 ARM64_SYS_REG(2, 0, 0, 6, 7),
747 ARM64_SYS_REG(2, 0, 0, 7, 6),
751 ARM64_SYS_REG(2, 0, 0, 8, 6),
755 ARM64_SYS_REG(2, 0, 0, 9, 6),
759 ARM64_SYS_REG(2, 0, 0, 10, 6),
763 ARM64_SYS_REG(2, 0, 0, 11, 6),
767 ARM64_SYS_REG(2, 0, 0, 12, 6),
771 ARM64_SYS_REG(2, 0, 0, 13, 6),
775 ARM64_SYS_REG(2, 0, 0, 14, 6),
779 ARM64_SYS_REG(2, 0, 0, 15, 6),
790 ARM64_SYS_REG(3, 0, 0, 1, 6), /* ID_MMFR2_EL1 */
798 ARM64_SYS_REG(3, 0, 0, 2, 6), /* ID_MMFR4_EL1 */
806 ARM64_SYS_REG(3, 0, 0, 3, 6), /* ID_MMFR5_EL1 */
814 ARM64_SYS_REG(3, 0, 0, 4, 6),
822 ARM64_SYS_REG(3, 0, 0, 5, 6),
824 ARM64_SYS_REG(3, 0, 0, 6, 0), /* ID_AA64ISAR0_EL1 */
825 ARM64_SYS_REG(3, 0, 0, 6, 1), /* ID_AA64ISAR1_EL1 */
826 ARM64_SYS_REG(3, 0, 0, 6, 2),
827 ARM64_SYS_REG(3, 0, 0, 6, 3),
828 ARM64_SYS_REG(3, 0, 0, 6, 4),
829 ARM64_SYS_REG(3, 0, 0, 6, 5),
830 ARM64_SYS_REG(3, 0, 0, 6, 6),
831 ARM64_SYS_REG(3, 0, 0, 6, 7),
838 ARM64_SYS_REG(3, 0, 0, 7, 6),
849 ARM64_SYS_REG(3, 0, 6, 0, 0), /* FAR_EL1 */
884 ARM64_SYS_REG(3, 3, 14, 8, 6),
892 ARM64_SYS_REG(3, 3, 14, 9, 6),
900 ARM64_SYS_REG(3, 3, 14, 10, 6),
908 ARM64_SYS_REG(3, 3, 14, 11, 6),
915 ARM64_SYS_REG(3, 3, 14, 12, 6),
923 ARM64_SYS_REG(3, 3, 14, 13, 6),
931 ARM64_SYS_REG(3, 3, 14, 14, 6),
939 ARM64_SYS_REG(3, 3, 14, 15, 6),
950 KVM_REG_ARM64 | KVM_REG_SIZE_U128 | KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(fp_regs.vregs[6]),
986 KVM_REG_ARM64_SVE_ZREG(6, 0),
1018 KVM_REG_ARM64_SVE_PREG(6, 0),