5  * Copyright (C) 2020, Red Hat, Inc.
59 #define for_each_sublist(c, s)							\  argument
60 	for ((s) = &(c)->sublists[0]; (s)->regs; ++(s))
77 static const char *config_name(struct vcpu_config *c)  in config_name()  argument
82 	if (c->name)  in config_name()
83 		return c->name;  in config_name()
85 	for_each_sublist(c, s)  in config_name()
88 	c->name = malloc(len);  in config_name()
91 	for_each_sublist(c, s) {  in config_name()
94 		strcat(c->name + len, s->name);  in config_name()
96 		c->name[len - 1] = '+';  in config_name()
98 	c->name[len - 1] = '\0';  in config_name()
100 	return c->name;  in config_name()
103 static bool has_cap(struct vcpu_config *c, long capability)  in has_cap()  argument
107 	for_each_sublist(c, s)  in has_cap()
143 	strcat(p + n, strstr(template, "##") + 2);  in str_with_index()
150 #define CORE_REGS_XX_NR_WORDS	2
151 #define CORE_SPSR_XX_NR_WORDS	2
154 static const char *core_id_to_str(struct vcpu_config *c, __u64 id)  in core_id_to_str()  argument
165 		TEST_ASSERT(idx < 31, "%s: Unexpected regs.regs index: %lld", config_name(c), idx);  in core_id_to_str()
180 		TEST_ASSERT(idx < KVM_NR_SPSR, "%s: Unexpected spsr index: %lld", config_name(c), idx);  in core_id_to_str()
185 		TEST_ASSERT(idx < 32, "%s: Unexpected fp_regs.vregs index: %lld", config_name(c), idx);  in core_id_to_str()
193 	TEST_FAIL("%s: Unknown core reg id: 0x%llx", config_name(c), id);  in core_id_to_str()
197 static const char *sve_id_to_str(struct vcpu_config *c, __u64 id)  in sve_id_to_str()  argument
207 	TEST_ASSERT(i == 0, "%s: Currently we don't expect slice > 0, reg id 0x%llx", config_name(c), id);  in sve_id_to_str()
214 			    "%s: Unexpected bits set in SVE ZREG id: 0x%llx", config_name(c), id);  in sve_id_to_str()
220 			    "%s: Unexpected bits set in SVE PREG id: 0x%llx", config_name(c), id);  in sve_id_to_str()
224 			    "%s: Unexpected bits set in SVE FFR id: 0x%llx", config_name(c), id);  in sve_id_to_str()
231 static void print_reg(struct vcpu_config *c, __u64 id)  in print_reg()  argument
237 		    "%s: KVM_REG_ARM64 missing in reg id: 0x%llx", config_name(c), id);  in print_reg()
269 			  config_name(c), (id & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT, id);  in print_reg()
274 		printf("\tKVM_REG_ARM64 | %s | KVM_REG_ARM_CORE | %s,\n", reg_size, core_id_to_str(c, id));  in print_reg()
278 			    "%s: Unexpected bits set in DEMUX reg id: 0x%llx", config_name(c), id);  in print_reg()
289 			    "%s: Unexpected bits set in SYSREG reg id: 0x%llx", config_name(c), id);  in print_reg()
294 			    "%s: Unexpected bits set in FW reg id: 0x%llx", config_name(c), id);  in print_reg()
299 			    "%s: Unexpected bits set in the bitmap feature FW reg id: 0x%llx", config_name(c), id);  in print_reg()
303 		if (has_cap(c, KVM_CAP_ARM_SVE))  in print_reg()
304 			printf("\t%s,\n", sve_id_to_str(c, id));  in print_reg()
306 …TEST_FAIL("%s: KVM_REG_ARM64_SVE is an unexpected coproc type in reg id: 0x%llx", config_name(c), …  in print_reg()
310 			  config_name(c), (id & KVM_REG_ARM_COPROC_MASK) >> KVM_REG_ARM_COPROC_SHIFT, id);  in print_reg()
371 static void prepare_vcpu_init(struct vcpu_config *c, struct kvm_vcpu_init *init)  in prepare_vcpu_init()  argument
375 	for_each_sublist(c, s)  in prepare_vcpu_init()
380 static void finalize_vcpu(struct kvm_vcpu *vcpu, struct vcpu_config *c)  in finalize_vcpu()  argument
385 	for_each_sublist(c, s) {  in finalize_vcpu()
393 static void check_supported(struct vcpu_config *c)  in check_supported()  argument
397 	for_each_sublist(c, s) {  in check_supported()
403 			       config_name(c), s->name);  in check_supported()
411 static void run_test(struct vcpu_config *c)  in run_test()  argument
420 	check_supported(c);  in run_test()
423 	prepare_vcpu_init(c, &init);  in run_test()
426 	finalize_vcpu(vcpu, c);  in run_test()
439 				print_reg(c, id);  in run_test()
466 			printf("%s: Failed to get ", config_name(c));  in run_test()
467 			print_reg(c, reg.id);  in run_test()
473 		for_each_sublist(c, s) {  in run_test()
478 					printf("%s: Failed to reject (ret=%d, errno=%d) ", config_name(c), ret, errno);  in run_test()
479 					print_reg(c, reg.id);  in run_test()
490 				printf("%s: Failed to set ", config_name(c));  in run_test()
491 				print_reg(c, reg.id);  in run_test()
498 	for_each_sublist(c, s)  in run_test()
503 	for_each_sublist(c, s) {  in run_test()
519 		printf("%s: Number blessed registers: %5lld\n", config_name(c), blessed_n);  in run_test()
521 		       config_name(c), reg_list->n, reg_list->n - n);  in run_test()
527 		       "list with the following lines:\n\n", config_name(c), new_regs);  in run_test()
529 			print_reg(c, reg_list->reg[i]);  in run_test()
535 		       "The following lines are missing registers:\n\n", config_name(c), missing_regs);  in run_test()
537 			print_reg(c, blessed_reg[i]);  in run_test()
544 		    config_name(c), missing_regs, failed_get, failed_set, failed_reject);  in run_test()
546 	pr_info("%s: PASS\n", config_name(c));  in run_test()
555 	struct vcpu_config *c;  in help()  local
565 		c = vcpu_configs[i];  in help()
567 	"                               '%s'\n", config_name(c));  in help()
581 	struct vcpu_config *c;  in parse_config()  local
588 		c = vcpu_configs[i];  in parse_config()
589 		if (strcmp(config_name(c), &config[9]) == 0)  in parse_config()
596 	return c;  in parse_config()
601 	struct vcpu_config *c, *sel = NULL;  in main()  local
629 		c = vcpu_configs[i];  in main()
630 		if (sel && c != sel)  in main()
636 			run_test(c);  in main()
659 	KVM_REG_ARM64 | KVM_REG_SIZE_U64 | KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(regs.regs[2]),
695 	KVM_REG_ARM64 | KVM_REG_SIZE_U64 | KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(spsr[2]),
702 	KVM_REG_ARM_FW_REG(2),		/* KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2 */
706 	KVM_REG_ARM_FW_FEAT_BMAP_REG(2),	/* KVM_REG_ARM_VENDOR_HYP_BMAP */
708 	ARM64_SYS_REG(3, 3, 14, 3, 2),	/* CNTV_CVAL_EL0 */
709 	ARM64_SYS_REG(3, 3, 14, 0, 2),
715 	ARM64_SYS_REG(2, 0, 0, 0, 4),
716 	ARM64_SYS_REG(2, 0, 0, 0, 5),
717 	ARM64_SYS_REG(2, 0, 0, 0, 6),
718 	ARM64_SYS_REG(2, 0, 0, 0, 7),
719 	ARM64_SYS_REG(2, 0, 0, 1, 4),
720 	ARM64_SYS_REG(2, 0, 0, 1, 5),
721 	ARM64_SYS_REG(2, 0, 0, 1, 6),
722 	ARM64_SYS_REG(2, 0, 0, 1, 7),
723 	ARM64_SYS_REG(2, 0, 0, 2, 0),	/* MDCCINT_EL1 */
724 	ARM64_SYS_REG(2, 0, 0, 2, 2),	/* MDSCR_EL1 */
725 	ARM64_SYS_REG(2, 0, 0, 2, 4),
726 	ARM64_SYS_REG(2, 0, 0, 2, 5),
727 	ARM64_SYS_REG(2, 0, 0, 2, 6),
728 	ARM64_SYS_REG(2, 0, 0, 2, 7),
729 	ARM64_SYS_REG(2, 0, 0, 3, 4),
730 	ARM64_SYS_REG(2, 0, 0, 3, 5),
731 	ARM64_SYS_REG(2, 0, 0, 3, 6),
732 	ARM64_SYS_REG(2, 0, 0, 3, 7),
733 	ARM64_SYS_REG(2, 0, 0, 4, 4),
734 	ARM64_SYS_REG(2, 0, 0, 4, 5),
735 	ARM64_SYS_REG(2, 0, 0, 4, 6),
736 	ARM64_SYS_REG(2, 0, 0, 4, 7),
737 	ARM64_SYS_REG(2, 0, 0, 5, 4),
738 	ARM64_SYS_REG(2, 0, 0, 5, 5),
739 	ARM64_SYS_REG(2, 0, 0, 5, 6),
740 	ARM64_SYS_REG(2, 0, 0, 5, 7),
741 	ARM64_SYS_REG(2, 0, 0, 6, 4),
742 	ARM64_SYS_REG(2, 0, 0, 6, 5),
743 	ARM64_SYS_REG(2, 0, 0, 6, 6),
744 	ARM64_SYS_REG(2, 0, 0, 6, 7),
745 	ARM64_SYS_REG(2, 0, 0, 7, 4),
746 	ARM64_SYS_REG(2, 0, 0, 7, 5),
747 	ARM64_SYS_REG(2, 0, 0, 7, 6),
748 	ARM64_SYS_REG(2, 0, 0, 7, 7),
749 	ARM64_SYS_REG(2, 0, 0, 8, 4),
750 	ARM64_SYS_REG(2, 0, 0, 8, 5),
751 	ARM64_SYS_REG(2, 0, 0, 8, 6),
752 	ARM64_SYS_REG(2, 0, 0, 8, 7),
753 	ARM64_SYS_REG(2, 0, 0, 9, 4),
754 	ARM64_SYS_REG(2, 0, 0, 9, 5),
755 	ARM64_SYS_REG(2, 0, 0, 9, 6),
756 	ARM64_SYS_REG(2, 0, 0, 9, 7),
757 	ARM64_SYS_REG(2, 0, 0, 10, 4),
758 	ARM64_SYS_REG(2, 0, 0, 10, 5),
759 	ARM64_SYS_REG(2, 0, 0, 10, 6),
760 	ARM64_SYS_REG(2, 0, 0, 10, 7),
761 	ARM64_SYS_REG(2, 0, 0, 11, 4),
762 	ARM64_SYS_REG(2, 0, 0, 11, 5),
763 	ARM64_SYS_REG(2, 0, 0, 11, 6),
764 	ARM64_SYS_REG(2, 0, 0, 11, 7),
765 	ARM64_SYS_REG(2, 0, 0, 12, 4),
766 	ARM64_SYS_REG(2, 0, 0, 12, 5),
767 	ARM64_SYS_REG(2, 0, 0, 12, 6),
768 	ARM64_SYS_REG(2, 0, 0, 12, 7),
769 	ARM64_SYS_REG(2, 0, 0, 13, 4),
770 	ARM64_SYS_REG(2, 0, 0, 13, 5),
771 	ARM64_SYS_REG(2, 0, 0, 13, 6),
772 	ARM64_SYS_REG(2, 0, 0, 13, 7),
773 	ARM64_SYS_REG(2, 0, 0, 14, 4),
774 	ARM64_SYS_REG(2, 0, 0, 14, 5),
775 	ARM64_SYS_REG(2, 0, 0, 14, 6),
776 	ARM64_SYS_REG(2, 0, 0, 14, 7),
777 	ARM64_SYS_REG(2, 0, 0, 15, 4),
778 	ARM64_SYS_REG(2, 0, 0, 15, 5),
779 	ARM64_SYS_REG(2, 0, 0, 15, 6),
780 	ARM64_SYS_REG(2, 0, 0, 15, 7),
781 	ARM64_SYS_REG(2, 0, 1, 1, 4),	/* OSLSR_EL1 */
782 	ARM64_SYS_REG(2, 4, 0, 7, 0),	/* DBGVCR32_EL2 */
786 	ARM64_SYS_REG(3, 0, 0, 1, 2),	/* ID_DFR0_EL1 */
792 	ARM64_SYS_REG(3, 0, 0, 2, 0),	/* ID_ISAR0_EL1 */
793 	ARM64_SYS_REG(3, 0, 0, 2, 1),	/* ID_ISAR1_EL1 */
794 	ARM64_SYS_REG(3, 0, 0, 2, 2),	/* ID_ISAR2_EL1 */
795 	ARM64_SYS_REG(3, 0, 0, 2, 3),	/* ID_ISAR3_EL1 */
796 	ARM64_SYS_REG(3, 0, 0, 2, 4),	/* ID_ISAR4_EL1 */
797 	ARM64_SYS_REG(3, 0, 0, 2, 5),	/* ID_ISAR5_EL1 */
798 	ARM64_SYS_REG(3, 0, 0, 2, 6),	/* ID_MMFR4_EL1 */
799 	ARM64_SYS_REG(3, 0, 0, 2, 7),	/* ID_ISAR6_EL1 */
802 	ARM64_SYS_REG(3, 0, 0, 3, 2),	/* MVFR2_EL1 */
810 	ARM64_SYS_REG(3, 0, 0, 4, 2),
818 	ARM64_SYS_REG(3, 0, 0, 5, 2),
826 	ARM64_SYS_REG(3, 0, 0, 6, 2),
834 	ARM64_SYS_REG(3, 0, 0, 7, 2),	/* ID_AA64MMFR2_EL1 */
842 	ARM64_SYS_REG(3, 0, 1, 0, 2),	/* CPACR_EL1 */
843 	ARM64_SYS_REG(3, 0, 2, 0, 0),	/* TTBR0_EL1 */
844 	ARM64_SYS_REG(3, 0, 2, 0, 1),	/* TTBR1_EL1 */
845 	ARM64_SYS_REG(3, 0, 2, 0, 2),	/* TCR_EL1 */
848 	ARM64_SYS_REG(3, 0, 5, 2, 0),	/* ESR_EL1 */
851 	ARM64_SYS_REG(3, 0, 10, 2, 0),	/* MAIR_EL1 */
858 	ARM64_SYS_REG(3, 2, 0, 0, 0),	/* CSSELR_EL1 */
859 	ARM64_SYS_REG(3, 3, 13, 0, 2),	/* TPIDR_EL0 */
868 	ARM64_SYS_REG(3, 0, 9, 14, 2),	/* PMINTENCLR_EL1 */
871 	ARM64_SYS_REG(3, 3, 9, 12, 2),	/* PMCNTENCLR_EL0 */
880 	ARM64_SYS_REG(3, 3, 14, 8, 2),
888 	ARM64_SYS_REG(3, 3, 14, 9, 2),
896 	ARM64_SYS_REG(3, 3, 14, 10, 2),
904 	ARM64_SYS_REG(3, 3, 14, 11, 2),
911 	ARM64_SYS_REG(3, 3, 14, 12, 2),
919 	ARM64_SYS_REG(3, 3, 14, 13, 2),
927 	ARM64_SYS_REG(3, 3, 14, 14, 2),
935 	ARM64_SYS_REG(3, 3, 14, 15, 2),
946 	KVM_REG_ARM64 | KVM_REG_SIZE_U128 | KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(fp_regs.vregs[2]),
982 	KVM_REG_ARM64_SVE_ZREG(2, 0),
1014 	KVM_REG_ARM64_SVE_PREG(2, 0),
1029 	ARM64_SYS_REG(3, 0, 1, 2, 0),   /* ZCR_EL1 */
1037 	ARM64_SYS_REG(3, 0, 2, 1, 0),	/* APIAKEYLO_EL1 */
1038 	ARM64_SYS_REG(3, 0, 2, 1, 1),	/* APIAKEYHI_EL1 */
1039 	ARM64_SYS_REG(3, 0, 2, 1, 2),	/* APIBKEYLO_EL1 */
1040 	ARM64_SYS_REG(3, 0, 2, 1, 3),	/* APIBKEYHI_EL1 */
1041 	ARM64_SYS_REG(3, 0, 2, 2, 0),	/* APDAKEYLO_EL1 */
1042 	ARM64_SYS_REG(3, 0, 2, 2, 1),	/* APDAKEYHI_EL1 */
1043 	ARM64_SYS_REG(3, 0, 2, 2, 2),	/* APDBKEYLO_EL1 */
1044 	ARM64_SYS_REG(3, 0, 2, 2, 3)	/* APDBKEYHI_EL1 */
1048 	ARM64_SYS_REG(3, 0, 2, 3, 0),	/* APGAKEYLO_EL1 */
1049 	ARM64_SYS_REG(3, 0, 2, 3, 1),	/* APGAKEYHI_EL1 */