1 // SPDX-License-Identifier: GPL-2.0
3  * AMD specific. Provide textual annotation for IBS raw sample data.
12 #include "../../arch/x86/include/asm/amd-ibs.h"
17 #include "sample-raw.h"
18 #include "pmu-events/pmu-events.h"
23 static void pr_ibs_fetch_ctl(union ibs_fetch_ctl reg)  in pr_ibs_fetch_ctl()  argument
50 		if (reg.phy_addr_valid)  in pr_ibs_fetch_ctl()
51 			l1tlb_pgsz_str = l1tlb_pgsz_strs_erratum1347[reg.l1tlb_pgsz];  in pr_ibs_fetch_ctl()
53 		if (reg.phy_addr_valid)  in pr_ibs_fetch_ctl()
54 			l1tlb_pgsz_str = l1tlb_pgsz_strs[reg.l1tlb_pgsz];  in pr_ibs_fetch_ctl()
55 		ic_miss_str = ic_miss_strs[reg.ic_miss];  in pr_ibs_fetch_ctl()
61 			 reg.l3_miss_only, reg.fetch_oc_miss, reg.fetch_l3_miss);  in pr_ibs_fetch_ctl()
66 		reg.val, reg.fetch_maxcnt << 4, reg.fetch_cnt << 4, reg.fetch_lat,  in pr_ibs_fetch_ctl()
67 		reg.fetch_en, reg.fetch_val, reg.fetch_comp, ic_miss_str ? : "",  in pr_ibs_fetch_ctl()
68 		reg.phy_addr_valid, l1tlb_pgsz_str ? : "", reg.l1tlb_miss, reg.l2tlb_miss,  in pr_ibs_fetch_ctl()
69 		reg.rand_en, reg.fetch_comp ? (reg.fetch_l2_miss ? " L2Miss 1" : " L2Miss 0") : "",  in pr_ibs_fetch_ctl()
73 static void pr_ic_ibs_extd_ctl(union ic_ibs_extd_ctl reg)  in pr_ic_ibs_extd_ctl()  argument
75 	printf("ic_ibs_ext_ctl:\t%016llx IbsItlbRefillLat %3d\n", reg.val, reg.itlb_refill_lat);  in pr_ic_ibs_extd_ctl()
78 static void pr_ibs_op_ctl(union ibs_op_ctl reg)  in pr_ibs_op_ctl()  argument
83 		snprintf(l3_miss_only, sizeof(l3_miss_only), " L3MissOnly %d", reg.l3_miss_only);  in pr_ibs_op_ctl()
86 		reg.val, ((reg.opmaxcnt_ext << 16) | reg.opmaxcnt) << 4, l3_miss_only,  in pr_ibs_op_ctl()
87 		reg.op_en, reg.op_val, reg.cnt_ctl,  in pr_ibs_op_ctl()
88 		reg.cnt_ctl ? "uOps" : "cycles", reg.opcurcnt);  in pr_ibs_op_ctl()
91 static void pr_ibs_op_data(union ibs_op_data reg)  in pr_ibs_op_data()  argument
95 		reg.val, reg.comp_to_ret_ctr, reg.tag_to_ret_ctr,  in pr_ibs_op_data()
96 		reg.op_brn_ret ? (reg.op_return ? " OpReturn 1" : " OpReturn 0") : "",  in pr_ibs_op_data()
97 		reg.op_brn_ret ? (reg.op_brn_taken ? " OpBrnTaken 1" : " OpBrnTaken 0") : "",  in pr_ibs_op_data()
98 		reg.op_brn_ret ? (reg.op_brn_misp ? " OpBrnMisp 1" : " OpBrnMisp 0") : "",  in pr_ibs_op_data()
99 		reg.op_brn_ret, reg.op_rip_invalid, reg.op_brn_fuse, reg.op_microcode);  in pr_ibs_op_data()
102 static void pr_ibs_op_data2_extended(union ibs_op_data2 reg)  in pr_ibs_op_data2_extended()  argument
108 		" DataSrc 3=Data returned from DRAM",  in pr_ibs_op_data2_extended()
112 		" DataSrc 7=Data returned from MMIO/Config/PCI/APIC",  in pr_ibs_op_data2_extended()
113 		" DataSrc 8=Extension Memory (S-Link, GenZ, etc)",  in pr_ibs_op_data2_extended()
120 	int data_src = (reg.data_src_hi << 3) | reg.data_src_lo;  in pr_ibs_op_data2_extended()
122 	printf("ibs_op_data2:\t%016llx %sRmtNode %d%s\n", reg.val,  in pr_ibs_op_data2_extended()
124 			(reg.cache_hit_st ? "CacheHitSt 1=O-State " : "CacheHitSt 0=M-state ") : "",  in pr_ibs_op_data2_extended()
125 		reg.rmt_node,  in pr_ibs_op_data2_extended()
129 static void pr_ibs_op_data2_default(union ibs_op_data2 reg)  in pr_ibs_op_data2_default()  argument
142 	printf("ibs_op_data2:\t%016llx %sRmtNode %d%s\n", reg.val,  in pr_ibs_op_data2_default()
143 	       reg.data_src_lo == 2 ? (reg.cache_hit_st ? "CacheHitSt 1=O-State "  in pr_ibs_op_data2_default()
144 						     : "CacheHitSt 0=M-state ") : "",  in pr_ibs_op_data2_default()
145 	       reg.rmt_node, data_src_str[reg.data_src_lo]);  in pr_ibs_op_data2_default()
148 static void pr_ibs_op_data2(union ibs_op_data2 reg)  in pr_ibs_op_data2()  argument
151 		return pr_ibs_op_data2_extended(reg);  in pr_ibs_op_data2()
152 	pr_ibs_op_data2_default(reg);  in pr_ibs_op_data2()
155 static void pr_ibs_op_data3(union ibs_op_data3 reg)  in pr_ibs_op_data3()  argument
165 	if (!(cpu_family == 0x19 && cpu_model < 0x10 && (reg.dc_miss_no_mab_alloc || reg.sw_pf))) {  in pr_ibs_op_data3()
166 		snprintf(l2_miss_str, sizeof(l2_miss_str), " L2Miss %d", reg.l2_miss);  in pr_ibs_op_data3()
168 			 " OpDcMissOpenMemReqs %2d", reg.op_dc_miss_open_mem_reqs);  in pr_ibs_op_data3()
171 	if (reg.op_mem_width)  in pr_ibs_op_data3()
173 			 " OpMemWidth %2d bytes", 1 << (reg.op_mem_width - 1));  in pr_ibs_op_data3()
179 		reg.val, reg.ld_op, reg.st_op, reg.dc_l1tlb_miss, reg.dc_l2tlb_miss,  in pr_ibs_op_data3()
180 		reg.dc_l1tlb_hit_2m, reg.dc_l1tlb_hit_1g, reg.dc_l2tlb_hit_2m, reg.dc_miss,  in pr_ibs_op_data3()
181 		reg.dc_mis_acc, reg.dc_wc_mem_acc, reg.dc_uc_mem_acc, reg.dc_locked_op,  in pr_ibs_op_data3()
182 		reg.dc_miss_no_mab_alloc, reg.dc_lin_addr_valid, reg.dc_phy_addr_valid,  in pr_ibs_op_data3()
183 		reg.dc_l2_tlb_hit_1g, l2_miss_str, reg.sw_pf, op_mem_width_str,  in pr_ibs_op_data3()
184 		op_dc_miss_open_mem_reqs_str, reg.dc_miss_lat, reg.tlb_refill_lat);  in pr_ibs_op_data3()
194 	struct perf_ibs_data *data = sample->raw_data;  in amd_dump_ibs_op()  local
195 	union ibs_op_ctl *op_ctl = (union ibs_op_ctl *)data->data;  in amd_dump_ibs_op()
201 	if (!op_data->op_rip_invalid)  in amd_dump_ibs_op()
208 	      (op_data3->dc_miss_no_mab_alloc || op_data3->sw_pf)))  in amd_dump_ibs_op()
211 	if (op_data3->dc_lin_addr_valid)  in amd_dump_ibs_op()
213 	if (op_data3->dc_phy_addr_valid)  in amd_dump_ibs_op()
215 	if (op_data->op_brn_ret && *(rip + 6))  in amd_dump_ibs_op()
225 	struct perf_ibs_data *data = sample->raw_data;  in amd_dump_ibs_fetch()  local
226 	union ibs_fetch_ctl *fetch_ctl = (union ibs_fetch_ctl *)data->data;  in amd_dump_ibs_fetch()
232 	if (fetch_ctl->phy_addr_valid)  in amd_dump_ibs_fetch()
242 	struct perf_ibs_data *data = sample->raw_data;  in is_valid_ibs_fetch_sample()  local
243 	union ibs_fetch_ctl *fetch_ctl = (union ibs_fetch_ctl *)data->data;  in is_valid_ibs_fetch_sample()
245 	if (fetch_ctl->fetch_en && fetch_ctl->fetch_val)  in is_valid_ibs_fetch_sample()
253 	struct perf_ibs_data *data = sample->raw_data;  in is_valid_ibs_op_sample()  local
254 	union ibs_op_ctl *op_ctl = (union ibs_op_ctl *)data->data;  in is_valid_ibs_op_sample()
256 	if (op_ctl->op_en && op_ctl->op_val)  in is_valid_ibs_op_sample()
263  * and if the event was triggered by IBS, display its raw data with decoded text.
264  * The function is only invoked when the dump flag -D is set.
271 	if (event->header.type != PERF_RECORD_SAMPLE || !sample->raw_size)  in evlist__amd_sample_raw()
278 	if (evsel->core.attr.type == ibs_fetch_type) {  in evlist__amd_sample_raw()
280 			pr_debug("Invalid raw IBS Fetch MSR data encountered\n");  in evlist__amd_sample_raw()
284 	} else if (evsel->core.attr.type == ibs_op_type) {  in evlist__amd_sample_raw()
286 			pr_debug("Invalid raw IBS Op MSR data encountered\n");  in evlist__amd_sample_raw()
309  * Device names can be large - we are only interested in the first 9 characters,
314 	struct perf_env *env = evlist->env;  in evlist__has_amd_ibs()
320 	while (nr_pmu_mappings--) {  in evlist__has_amd_ibs()