Lines Matching full:point

3 …once for most SIMD 128-bit packed computational double precision floating-point instructions retir…
8point instructions retired; some instructions will count twice as noted below. Each count represe…
13 …once for most SIMD 128-bit packed computational single precision floating-point instruction retire…
18point instructions retired; some instructions will count twice as noted below. Each count represe…
23 …once for most SIMD 256-bit packed double computational precision floating-point instructions retir…
28point instructions retired; some instructions will count twice as noted below. Each count represe…
33 …once for most SIMD 256-bit packed single computational precision floating-point instructions retir…
38point instructions retired; some instructions will count twice as noted below. Each count represe…
43point instructions retired; some instructions will count twice as noted below. Each count represe…
48point instructions retired; some instructions will count twice as noted below. Each count represe…
53point instructions retired; some instructions will count twice as noted below. Each count represe…
58point instructions retired; some instructions will count twice as noted below. Each count represe…
63 …"Counts once for most SIMD scalar computational double precision floating-point instructions retir…
68point instructions retired; some instructions will count twice as noted below. Each count represe…
73 …"Counts once for most SIMD scalar computational single precision floating-point instructions retir…
78point instructions retired; some instructions will count twice as noted below. Each count represe…