Lines Matching full:cycles

18 …er (DSB) cache and u-arch forced misses.\nNote: Invoking MITE requires two or three cycles delay.",
23         "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.",
28 …cycles. These cycles do not include uops routed through because of the switch itself, for example,…
115 …er an interval where the front-end delivered no uops for a period of 128 cycles which was not inte…
128 …ter an interval where the front-end delivered no uops for a period of 16 cycles which was not inte…
136 …hat are delivered to the back-end after a front-end stall of at least 16 cycles. During this perio…
142 …fter an interval where the front-end delivered no uops for a period of 2 cycles which was not inte…
155 …er an interval where the front-end delivered no uops for a period of 256 cycles which was not inte…
168 …nterval where the front-end had at least 1 bubble-slot for a period of 2 cycles which was not inte…
176 …ack-end after the front-end had at least 1 bubble-slot for a period of 2 cycles. A bubble-slot is …
182 …terval where the front-end had at least 2 bubble-slots for a period of 2 cycles which was not inte…
195 …terval where the front-end had at least 3 bubble-slots for a period of 2 cycles which was not inte…
208 …ter an interval where the front-end delivered no uops for a period of 32 cycles which was not inte…
216 …hat are delivered to the back-end after a front-end stall of at least 32 cycles. During this perio…
222 …fter an interval where the front-end delivered no uops for a period of 4 cycles which was not inte…
235 …er an interval where the front-end delivered no uops for a period of 512 cycles which was not inte…
248 …ter an interval where the front-end delivered no uops for a period of 64 cycles which was not inte…
261 …fter an interval where the front-end delivered no uops for a period of 8 cycles which was not inte…
269 …that are delivered to the back-end after a front-end stall of at least 8 cycles. During this perio…
289 …      "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache miss.",
294 …"PublicDescription": "Cycles where a code line fetch is stalled due to an L1 instruction cache mis…
317 …  "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache tag miss.",
326         "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering 4 Uops",
332 …"PublicDescription": "Counts the number of cycles 4 uops were delivered to Instruction Decode Queu…
337         "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop",
343 …"PublicDescription": "Counts the number of cycles uops were delivered to Instruction Decode Queue …
348         "BriefDescription": "Cycles MITE is delivering 4 Uops",
354 …cycles 4 uops were delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pi…
359         "BriefDescription": "Cycles MITE is delivering any Uop",
365 …cycles uops were delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipe…
370 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from D…
376 …"PublicDescription": "Counts cycles during which uops are being delivered to Instruction Decode Qu…
391 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from M…
397 …"PublicDescription": "Counts cycles during which uops are being delivered to Instruction Decode Qu…
412 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) while …
418 …"PublicDescription": "Counts cycles during which uops are being delivered to Instruction Decode Qu…
423 …"BriefDescription": "Cycles when uops initiated by Decode Stream Buffer (DSB) are being delivered …
429 …"PublicDescription": "Counts cycles during which uops initiated by Decode Stream Buffer (DSB) are …
476 …"BriefDescription": "Cycles per thread when 4 or more uops are not delivered to Resource Allocatio…
482 …"PublicDescription": "Counts, on the per-thread basis, cycles when no uops are delivered to Resour…
487 …"BriefDescription": "Counts cycles FE delivered 4 uops or Resource Allocation Table (RAT) was stal…
498 …"BriefDescription": "Cycles per thread when 3 or more uops are not delivered to Resource Allocatio…
504 …"PublicDescription": "Counts, on the per-thread basis, cycles when less than 1 uop is delivered to…
509         "BriefDescription": "Cycles with less than 2 uops delivered by the front end.",
515         "PublicDescription": "Cycles with less than 2 uops delivered by the front-end.",
520         "BriefDescription": "Cycles with less than 3 uops delivered by the front end.",
526         "PublicDescription": "Cycles with less than 3 uops delivered by the front-end.",