Lines Matching +full:1 +full:- +full:3
5 "Counter": "0,1,2,3",
8 "PEBScounters": "0,1,2,3",
10 "Speculative": "1",
16 "Counter": "0,1,2,3",
19 "PEBScounters": "0,1,2,3",
20 …opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.",
22 "Speculative": "1",
28 "Counter": "0,1,2,3",
31 "PEBScounters": "0,1,2,3",
34 "Speculative": "1",
40 "Counter": "0,1,2,3",
41 "CounterMask": "1",
42 "EdgeDetect": "1",
45 "PEBScounters": "0,1,2,3",
48 "Speculative": "1",
54 "Counter": "0,1,2,3",
57 "PEBScounters": "0,1,2,3",
59 "Speculative": "1",
65 "Counter": "0,1,2,3",
68 "PEBScounters": "0,1,2,3",
71 "Speculative": "1",
77 "Counter": "0,1,2,3",
80 "PEBScounters": "0,1,2,3",
81 …-demand loads and gets hit at least once by demand. The valid outstanding interval is defined unti…
83 "Speculative": "1",
89 "Counter": "0,1,2,3",
90 "CounterMask": "1",
93 "PEBScounters": "0,1,2,3",
96 "Speculative": "1",
102 "Counter": "0,1,2,3",
105 "PEBScounters": "0,1,2,3",
108 "Speculative": "1",
114 "Counter": "0,1,2,3",
117 "PEBScounters": "0,1,2,3",
119 "Speculative": "1",
123 …"BriefDescription": "Non-modified cache lines that are silently dropped by L2 cache when triggered…
125 "Counter": "0,1,2,3",
128 "PEBScounters": "0,1,2,3",
129 …y an L2 cache fill. These lines are typically in Shared or Exclusive state. A non-threaded event.",
131 "Speculative": "1",
137 "Counter": "0,1,2,3",
140 "PEBScounters": "0,1,2,3",
143 "Speculative": "1",
149 "Counter": "0,1,2,3",
152 "PEBScounters": "0,1,2,3",
153 …"PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excl…
155 "Speculative": "1",
159 …"BriefDescription": "Read requests with true-miss in L2 cache.[This event is alias to L2_RQSTS.MIS…
161 "Counter": "0,1,2,3",
164 "PEBScounters": "0,1,2,3",
165 …ublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss exc…
167 "Speculative": "1",
173 "Counter": "0,1,2,3",
176 "PEBScounters": "0,1,2,3",
179 "Speculative": "1",
185 "Counter": "0,1,2,3",
188 "PEBScounters": "0,1,2,3",
189 …quests accessing the L2 cache. These requests may hit or miss L2 cache. True-miss exclude misses t…
191 "Speculative": "1",
197 "Counter": "0,1,2,3",
200 "PEBScounters": "0,1,2,3",
203 "Speculative": "1",
209 "Counter": "0,1,2,3",
212 "PEBScounters": "0,1,2,3",
215 "Speculative": "1",
221 "Counter": "0,1,2,3",
224 "PEBScounters": "0,1,2,3",
226 "Speculative": "1",
232 "Counter": "0,1,2,3",
235 "PEBScounters": "0,1,2,3",
238 "Speculative": "1",
244 "Counter": "0,1,2,3",
247 "PEBScounters": "0,1,2,3",
250 "Speculative": "1",
256 "Counter": "0,1,2,3",
259 "PEBScounters": "0,1,2,3",
262 "Speculative": "1",
268 "Counter": "0,1,2,3",
271 "PEBScounters": "0,1,2,3",
274 "Speculative": "1",
280 "Counter": "0,1,2,3",
283 "PEBScounters": "0,1,2,3",
284 …ublicDescription": "Counts demand Data Read requests with true-miss in the L2 cache. True-miss exc…
286 "Speculative": "1",
292 "Counter": "0,1,2,3",
295 "PEBScounters": "0,1,2,3",
297 "Speculative": "1",
301 …"BriefDescription": "Read requests with true-miss in L2 cache.[This event is alias to L2_REQUEST.M…
303 "Counter": "0,1,2,3",
306 "PEBScounters": "0,1,2,3",
307 …ublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss exc…
309 "Speculative": "1",
315 "Counter": "0,1,2,3",
318 "PEBScounters": "0,1,2,3",
319 …"PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excl…
321 "Speculative": "1",
327 "Counter": "0,1,2,3",
330 "PEBScounters": "0,1,2,3",
331 "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache.",
333 "Speculative": "1",
339 "Counter": "0,1,2,3",
342 "PEBScounters": "0,1,2,3",
343 "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache.",
345 "Speculative": "1",
351 "Counter": "0,1,2,3",
354 "PEBScounters": "0,1,2,3",
355 …tch requests that hit the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when …
357 "Speculative": "1",
363 "Counter": "0,1,2,3",
366 "PEBScounters": "0,1,2,3",
367 …ch requests that miss the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when …
369 "Speculative": "1",
373 …"BriefDescription": "Core-originated cacheable requests that missed L3 (Except hardware prefetche…
375 "Counter": "0,1,2,3,4,5,6,7",
378 "PEBScounters": "0,1,2,3,4,5,6,7",
379 … "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Reques…
381 "Speculative": "1",
385 …"BriefDescription": "Core-originated cacheable requests that refer to L3 (Except hardware prefetch…
387 "Counter": "0,1,2,3,4,5,6,7",
390 "PEBScounters": "0,1,2,3,4,5,6,7",
391 …n": "Counts core-originated cacheable requests to the L3 cache (Longest Latency cache). Requests i…
393 "Speculative": "1",
399 "Counter": "0,1,2,3",
400 "Data_LA": "1",
403 "PEBS": "1",
404 "PEBScounters": "0,1,2,3",
405 …. This event accounts for SW prefetch instructions of PREFETCHNTA or PREFETCHT0/1/2 or PREFETCHW.",
412 "Counter": "0,1,2,3",
413 "Data_LA": "1",
416 "L1_Hit_Indication": "1",
417 "PEBS": "1",
418 "PEBScounters": "0,1,2,3",
426 "Counter": "0,1,2,3",
427 "Data_LA": "1",
430 "L1_Hit_Indication": "1",
431 "PEBS": "1",
432 "PEBScounters": "0,1,2,3",
433 "PublicDescription": "Counts all retired memory instructions - loads and stores.",
440 "Counter": "0,1,2,3",
441 "Data_LA": "1",
444 "PEBS": "1",
445 "PEBScounters": "0,1,2,3",
453 "Counter": "0,1,2,3",
454 "Data_LA": "1",
457 "PEBS": "1",
458 "PEBScounters": "0,1,2,3",
466 "Counter": "0,1,2,3",
467 "Data_LA": "1",
470 "L1_Hit_Indication": "1",
471 "PEBS": "1",
472 "PEBScounters": "0,1,2,3",
480 "Counter": "0,1,2,3",
481 "Data_LA": "1",
484 "PEBS": "1",
485 "PEBScounters": "0,1,2,3",
486 …"PublicDescription": "Number of retired load instructions that (start a) miss in the 2nd-level TLB…
493 "Counter": "0,1,2,3",
494 "Data_LA": "1",
497 "L1_Hit_Indication": "1",
498 "PEBS": "1",
499 "PEBScounters": "0,1,2,3",
500 …"PublicDescription": "Number of retired store instructions that (start a) miss in the 2nd-level TL…
505 "BriefDescription": "Completed demand load uops that miss the L1 d-cache.",
507 "Counter": "0,1,2,3",
510 "PEBScounters": "0,1,2,3",
513 "Speculative": "1",
519 "Counter": "0,1,2,3",
520 "Data_LA": "1",
523 "PEBS": "1",
524 "PEBScounters": "0,1,2,3",
530 …tired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core …
532 "Counter": "0,1,2,3",
533 "Data_LA": "1",
536 "PEBS": "1",
537 "PEBScounters": "0,1,2,3",
538 …tired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core …
545 "Counter": "0,1,2,3",
546 "Data_LA": "1",
549 "PEBS": "1",
550 "PEBScounters": "0,1,2,3",
556 …: "Retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg core c…
558 "Counter": "0,1,2,3",
559 "Data_LA": "1",
562 "PEBS": "1",
563 "PEBScounters": "0,1,2,3",
564 …ts retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg core c…
570 "Counter": "0,1,2,3",
571 "Data_LA": "1",
574 "PEBScounters": "0,1,2,3",
581 "Counter": "0,1,2,3",
582 "Data_LA": "1",
585 "PEBScounters": "0,1,2,3",
591 "Counter": "0,1,2,3",
592 "Data_LA": "1",
595 "PEBScounters": "0,1,2,3",
602 "Counter": "0,1,2,3",
603 "Data_LA": "1",
606 "PEBScounters": "0,1,2,3",
612 "Counter": "0,1,2,3",
615 "PEBScounters": "0,1,2,3",
621 "BriefDescription": "Retired instructions with at least 1 uncacheable load or lock.",
623 "Counter": "0,1,2,3",
624 "Data_LA": "1",
627 "PEBS": "1",
628 "PEBScounters": "0,1,2,3",
629 …ired instructions with at least one load to uncacheable memory-type, or at least one cache-line sp…
636 "Counter": "0,1,2,3",
637 "Data_LA": "1",
640 "PEBS": "1",
641 "PEBScounters": "0,1,2,3",
649 "Counter": "0,1,2,3",
650 "Data_LA": "1",
653 "PEBS": "1",
654 "PEBScounters": "0,1,2,3",
662 "Counter": "0,1,2,3",
663 "Data_LA": "1",
666 "PEBS": "1",
667 "PEBScounters": "0,1,2,3",
675 "Counter": "0,1,2,3",
676 "Data_LA": "1",
679 "PEBS": "1",
680 "PEBScounters": "0,1,2,3",
688 "Counter": "0,1,2,3",
689 "Data_LA": "1",
692 "PEBS": "1",
693 "PEBScounters": "0,1,2,3",
701 "Counter": "0,1,2,3",
702 "Data_LA": "1",
705 "PEBS": "1",
706 "PEBScounters": "0,1,2,3",
714 "Counter": "0,1,2,3",
715 "Data_LA": "1",
718 "PEBS": "1",
719 "PEBScounters": "0,1,2,3",
726 "Counter": "0,1,2,3",
727 "Data_LA": "1",
730 "PEBScounters": "0,1,2,3",
738 "Counter": "0,1,2,3",
741 "PEBScounters": "0,1,2,3",
747 "Counter": "0,1,2,3,4,5,6,7",
750 "PEBScounters": "0,1,2,3,4,5,6,7",
751 …"PublicDescription": "Number of retired micro-operations (uops) for load or store memory accesses",
757 "Counter": "0,1,2,3",
762 "Offcore": "1",
768 "Counter": "0,1,2,3",
773 "Offcore": "1",
778 …m a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
779 "Counter": "0,1,2,3",
784 "Offcore": "1",
789 …hit a non-modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches o…
790 "Counter": "0,1,2,3",
795 "Offcore": "1",
801 "Counter": "0,1,2,3",
806 "Offcore": "1",
812 "Counter": "0,1,2,3",
817 "Offcore": "1",
823 "Counter": "0,1,2,3",
828 "Offcore": "1",
834 "Counter": "0,1,2,3",
839 "Offcore": "1",
845 "Counter": "0,1,2,3",
850 "Offcore": "1",
856 "Counter": "0,1,2,3",
861 "Offcore": "1",
866 …m a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
867 "Counter": "0,1,2,3",
872 "Offcore": "1",
877 …hit a non-modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches o…
878 "Counter": "0,1,2,3",
883 "Offcore": "1",
889 "Counter": "0,1,2,3",
894 "Offcore": "1",
900 "Counter": "0,1,2,3",
905 "Offcore": "1",
910 …m a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
911 "Counter": "0,1,2,3",
916 "Offcore": "1",
921 …hit a non-modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches o…
922 "Counter": "0,1,2,3",
927 "Offcore": "1",
933 "Counter": "0,1,2,3",
938 "Offcore": "1",
944 "Counter": "0,1,2,3",
949 "Offcore": "1",
955 "Counter": "0,1,2,3",
960 "Offcore": "1",
966 "Counter": "0,1,2,3",
971 "Offcore": "1",
977 "Counter": "0,1,2,3",
982 "Offcore": "1",
988 "Counter": "0,1,2,3",
993 "Offcore": "1",
999 "Counter": "0,1,2,3",
1004 "Offcore": "1",
1010 "Counter": "0,1,2,3",
1015 "Offcore": "1",
1020 …m a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
1021 "Counter": "0,1,2,3",
1026 "Offcore": "1",
1031 …hit a non-modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches o…
1032 "Counter": "0,1,2,3",
1037 "Offcore": "1",
1043 "Counter": "0,1,2,3",
1048 "Offcore": "1",
1054 "Counter": "0,1,2,3",
1059 "Offcore": "1",
1066 "Counter": "0,1,2,3",
1069 "PEBScounters": "0,1,2,3",
1071 "Speculative": "1",
1077 "Counter": "0,1,2,3",
1080 "PEBScounters": "0,1,2,3",
1083 "Speculative": "1",
1089 "Counter": "0,1,2,3",
1092 "PEBScounters": "0,1,2,3",
1095 "Speculative": "1",
1101 "Counter": "0,1,2,3",
1104 "PEBScounters": "0,1,2,3",
1106 "Speculative": "1",
1112 "Counter": "0,1,2,3",
1113 "CounterMask": "1",
1116 "PEBScounters": "0,1,2,3",
1118 "Speculative": "1",
1124 "Counter": "0,1,2,3",
1125 "CounterMask": "1",
1128 "PEBScounters": "0,1,2,3",
1130 "Speculative": "1",
1136 "Counter": "0,1,2,3",
1139 "PEBScounters": "0,1,2,3",
1141 "Speculative": "1",
1147 "Counter": "0,1,2,3",
1150 "PEBScounters": "0,1,2,3",
1153 "Speculative": "1",
1159 "Counter": "0,1,2,3",
1162 "PEBScounters": "0,1,2,3",
1165 "Speculative": "1",
1171 "Counter": "0,1,2,3",
1174 "PEBScounters": "0,1,2,3",
1177 "Speculative": "1",
1183 "Counter": "0,1,2,3",
1186 "PEBScounters": "0,1,2,3",
1189 "Speculative": "1",