Lines Matching full:cycles

23         "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles",
28         "PublicDescription": "Cycles DSB to MITE switches caused delay.",
33 …"BriefDescription": "Cycles when Decode Stream Buffer (DSB) fill encounter more than 3 Decode Stre…
53 …"BriefDescription": "Cycles where a code-fetch stalled due to L1 instruction-cache miss or an iTLB…
58 …"PublicDescription": "Cycles where a code-fetch stalled due to L1 instruction-cache miss or an iTL…
73         "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering 4 Uops",
79         "PublicDescription": "Counts cycles DSB is delivered four uops. Set Cmask = 4.",
84         "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop",
90         "PublicDescription": "Counts cycles DSB is delivered at least one uops. Set Cmask = 1.",
95         "BriefDescription": "Cycles MITE is delivering 4 Uops",
101         "PublicDescription": "Counts cycles MITE is delivered four uops. Set Cmask = 4.",
106         "BriefDescription": "Cycles MITE is delivering any Uop",
112         "PublicDescription": "Counts cycles MITE is delivered at least one uops. Set Cmask = 1.",
117 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from D…
123 …"PublicDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from …
133 …: "Increment each cycle. # of uops delivered to IDQ from DSB path. Set Cmask = 1 to count cycles.",
138         "BriefDescription": "Instruction Decode Queue (IDQ) empty cycles",
143         "PublicDescription": "Counts cycles the IDQ is empty.",
158 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from M…
164 …"PublicDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from …
174 …: "Increment each cycle # of uops delivered to IDQ from MITE path. Set Cmask = 1 to count cycles.",
179 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) while …
185 …"PublicDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) while…
190 …"BriefDescription": "Cycles when uops initiated by Decode Stream Buffer (DSB) are being delivered …
196 …"PublicDescription": "Cycles when uops initiated by Decode Stream Buffer (DSB) are being delivered…
218 …e # of uops delivered to IDQ when MS_busy by DSB. Set Cmask = 1 to count cycles. Add Edge=1 to cou…
228 …rement each cycle # of uops delivered to IDQ when MS_busy by MITE. Set Cmask = 1 to count cycles.",
250 …ch cycle # of uops delivered to IDQ from MS by either DSB or MITE. Set Cmask = 1 to count cycles.",
265 …"BriefDescription": "Cycles per thread when 4 or more uops are not delivered to Resource Allocatio…
275 …"BriefDescription": "Counts cycles FE delivered 4 uops or Resource Allocation Table (RAT) was stal…
286 …"BriefDescription": "Cycles per thread when 3 or more uops are not delivered to Resource Allocatio…
296         "BriefDescription": "Cycles with less than 2 uops delivered by the front end.",
306         "BriefDescription": "Cycles with less than 3 uops delivered by the front end.",