Lines Matching full:due
7 …ivered no uops while Backend could have accepted them. For example; stalls due to instruction-cach…
11 …"BriefDescription": "This metric represents fraction of slots the CPU was stalled due to Frontend …
15 …"PublicDescription": "This metric represents fraction of slots the CPU was stalled due to Frontend…
19 …"BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to instruct…
23 …"PublicDescription": "This metric represents fraction of cycles the CPU was stalled due to instruc…
27 …"BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to Instruct…
31 …"PublicDescription": "This metric represents fraction of cycles the CPU was stalled due to Instruc…
35 …"BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to Branch R…
39 …"PublicDescription": "This metric represents fraction of cycles the CPU was stalled due to Branch …
43 …"BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to Branch R…
47 …"PublicDescription": "This metric represents fraction of cycles the CPU was stalled due to Branch …
51 …"BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to Branch R…
55 …"PublicDescription": "This metric represents fraction of cycles the CPU was stalled due to Branch …
59 …"BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to new bran…
63 …"PublicDescription": "This metric represents fraction of cycles the CPU was stalled due to new bra…
67 …"BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to switches…
71 …"PublicDescription": "This metric represents fraction of cycles the CPU was stalled due to switche…
75 …"BriefDescription": "This metric represents fraction of cycles CPU was stalled due to Length Chang…
79 …"PublicDescription": "This metric represents fraction of cycles CPU was stalled due to Length Chan…
83 …n": "This metric estimates the fraction of cycles when the CPU was stalled due to switches of uop …
87 …n": "This metric estimates the fraction of cycles when the CPU was stalled due to switches of uop …
91 …"BriefDescription": "This metric represents fraction of slots the CPU was stalled due to Frontend …
95 …"PublicDescription": "This metric represents fraction of slots the CPU was stalled due to Frontend…
99 … metric represents Core fraction of cycles in which CPU was likely limited due to the MITE pipelin…
103 …due to the MITE pipeline (the legacy decode pipeline). This pipeline is used for code that was not…
107 … metric represents Core fraction of cycles in which CPU was likely limited due to DSB (decoded uop…
111 … metric represents Core fraction of cycles in which CPU was likely limited due to DSB (decoded uop…
115 …"BriefDescription": "This category represents fraction of slots wasted due to incorrect speculatio…
119 …due to incorrect speculations. This include slots used to issue uops that do not eventually get re…
123 …"BriefDescription": "This metric represents fraction of slots the CPU has wasted due to Branch Mis…
127 …"PublicDescription": "This metric represents fraction of slots the CPU has wasted due to Branch Mi…
131 …"BriefDescription": "This metric represents fraction of slots the CPU has wasted due to Machine Cl…
135 …due to Machine Clears. These slots are either wasted by uops fetched prior to the clear; or stall…
139 …is category represents fraction of slots where no uops are being delivered due to a lack of requir…
143 …due to a lack of required resources for accepting new uops in the Backend. Backend is the portion …
151 … Memory Bound estimates fraction of slots where pipeline is likely stalled due to demand load or s…
159 …; in certain cases like loads blocked on older stores; a load might suffer due to high latency eve…
179 …s metric represents fraction of cycles the CPU spent handling cache misses due to lock operations",
183 …resents fraction of cycles the CPU spent handling cache misses due to lock operations. Due to the …
211 …"BriefDescription": "This metric estimates how often the CPU was stalled due to L2 cache accesses …
215 …"PublicDescription": "This metric estimates how often the CPU was stalled due to L2 cache accesses…
219 …"BriefDescription": "This metric estimates how often the CPU was stalled due to loads accesses to …
223 …"PublicDescription": "This metric estimates how often the CPU was stalled due to loads accesses to…
227 …raction of cycles while the memory subsystem was handling synchronizations due to contested access…
231 …raction of cycles while the memory subsystem was handling synchronizations due to contested access…
235 …raction of cycles while the memory subsystem was handling synchronizations due to data-sharing acc…
239 …izations due to data-sharing accesses. Data shared by multiple Logical Processors (even just read …
267 … estimates fraction of cycles where the core's performance was likely hurt due to approaching band…
271 … estimates fraction of cycles where the core's performance was likely hurt due to approaching band…
275 … metric estimates fraction of cycles where the performance was likely hurt due to latency from ext…
279 … metric estimates fraction of cycles where the performance was likely hurt due to latency from ext…
283 …"BriefDescription": "This metric estimates how often CPU was stalled due to RFO store memory acce…
287 …"PublicDescription": "This metric estimates how often CPU was stalled due to RFO store memory acc…
299 …: "This metric roughly estimates how often CPU was handling synchronizations due to False Sharing",
303 …"This metric roughly estimates how often CPU was handling synchronizations due to False Sharing. F…
339 …c estimates fraction of cycles the CPU performance was potentially limited due to Core computation…
343 …c estimates fraction of cycles the CPU performance was potentially limited due to Core computation…
359 …due to heavy data-dependency among software instructions; or over oversubscribing a particular har…
476 …CPU has executed (retired). Note this metric's value may exceed its parent due to use of \"Uops\" …
492 …loating-point (FP) scalar uops fraction the CPU has retired. May overcount due to FMA double count…
500 …ion the CPU has retired aggregated across all vector widths. May overcount due to FMA double count…
508 … uops fraction the CPU has retired for 128-bit wide vectors. May overcount due to FMA double count…
516 … uops fraction the CPU has retired for 256-bit wide vectors. May overcount due to FMA double count…
611 …n units (regardless of precision or vector-width). Values > 1 are possible due to ([BDW+] Fused-Mu…
672 …ic instruction (lower number means higher occurrence rate). May undercount due to FMA double count…
679 …on instruction (lower number means higher occurrence rate). May undercount due to FMA double count…
686 …on instruction (lower number means higher occurrence rate). May undercount due to FMA double count…
693 …it instruction (lower number means higher occurrence rate). May undercount due to FMA double count…
700 …it instruction (lower number means higher occurrence rate). May undercount due to FMA double count…