Lines Matching full:due
7 …ivered no uops while Backend could have accepted them. For example; stalls due to instruction-cach…
12 …"BriefDescription": "This metric represents fraction of slots the CPU was stalled due to Frontend …
16 …"PublicDescription": "This metric represents fraction of slots the CPU was stalled due to Frontend…
21 …"BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to instruct…
25 …"PublicDescription": "This metric represents fraction of cycles the CPU was stalled due to instruc…
30 …"BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to Instruct…
34 …"PublicDescription": "This metric represents fraction of cycles the CPU was stalled due to Instruc…
39 …"BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to Branch R…
43 …"PublicDescription": "This metric represents fraction of cycles the CPU was stalled due to Branch …
48 …"BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to Branch R…
52 …"PublicDescription": "This metric represents fraction of cycles the CPU was stalled due to Branch …
57 …"BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to Branch R…
61 …"PublicDescription": "This metric represents fraction of cycles the CPU was stalled due to Branch …
66 …"BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to new bran…
70 …"PublicDescription": "This metric represents fraction of cycles the CPU was stalled due to new bra…
75 …"BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to switches…
79 …"PublicDescription": "This metric represents fraction of cycles the CPU was stalled due to switche…
84 …"BriefDescription": "This metric represents fraction of cycles CPU was stalled due to Length Chang…
88 …"PublicDescription": "This metric represents fraction of cycles CPU was stalled due to Length Chan…
93 …n": "This metric estimates the fraction of cycles when the CPU was stalled due to switches of uop …
97 …n": "This metric estimates the fraction of cycles when the CPU was stalled due to switches of uop …
102 …"BriefDescription": "This metric represents fraction of slots the CPU was stalled due to Frontend …
106 …"PublicDescription": "This metric represents fraction of slots the CPU was stalled due to Frontend…
111 … metric represents Core fraction of cycles in which CPU was likely limited due to the MITE pipelin…
115 …due to the MITE pipeline (the legacy decode pipeline). This pipeline is used for code that was not…
128 … metric represents Core fraction of cycles in which CPU was likely limited due to DSB (decoded uop…
132 … metric represents Core fraction of cycles in which CPU was likely limited due to DSB (decoded uop…
137 … metric represents Core fraction of cycles in which CPU was likely limited due to LSD (Loop Stream…
141 … metric represents Core fraction of cycles in which CPU was likely limited due to LSD (Loop Stream…
146 …"BriefDescription": "This category represents fraction of slots wasted due to incorrect speculatio…
150 …due to incorrect speculations. This include slots used to issue uops that do not eventually get re…
155 …"BriefDescription": "This metric represents fraction of slots the CPU has wasted due to Branch Mis…
159 …"PublicDescription": "This metric represents fraction of slots the CPU has wasted due to Branch Mi…
164 …"BriefDescription": "This metric represents fraction of slots the CPU has wasted due to Machine Cl…
168 …due to Machine Clears. These slots are either wasted by uops fetched prior to the clear; or stall…
173 …is category represents fraction of slots where no uops are being delivered due to a lack of requir…
177 …due to a lack of required resources for accepting new uops in the Backend. Backend is the portion …
186 … Memory Bound estimates fraction of slots where pipeline is likely stalled due to demand load or s…
195 …; in certain cases like loads blocked on older stores; a load might suffer due to high latency eve…
234 …s metric represents fraction of cycles the CPU spent handling cache misses due to lock operations",
238 …resents fraction of cycles the CPU spent handling cache misses due to lock operations. Due to the …
261 …"BriefDescription": "This metric estimates how often the CPU was stalled due to L2 cache accesses …
265 …"PublicDescription": "This metric estimates how often the CPU was stalled due to L2 cache accesses…
270 …"BriefDescription": "This metric estimates how often the CPU was stalled due to loads accesses to …
274 …"PublicDescription": "This metric estimates how often the CPU was stalled due to loads accesses to…
279 …raction of cycles while the memory subsystem was handling synchronizations due to contested access…
283 …raction of cycles while the memory subsystem was handling synchronizations due to contested access…
288 …raction of cycles while the memory subsystem was handling synchronizations due to data-sharing acc…
292 …izations due to data-sharing accesses. Data shared by multiple Logical Processors (even just read …
324 … estimates fraction of cycles where the core's performance was likely hurt due to approaching band…
328 … estimates fraction of cycles where the core's performance was likely hurt due to approaching band…
333 … metric estimates fraction of cycles where the performance was likely hurt due to latency from ext…
337 … metric estimates fraction of cycles where the performance was likely hurt due to latency from ext…
342 …"BriefDescription": "This metric estimates how often CPU was stalled due to RFO store memory acce…
346 …"PublicDescription": "This metric estimates how often CPU was stalled due to RFO store memory acc…
360 …: "This metric roughly estimates how often CPU was handling synchronizations due to False Sharing",
364 …"This metric roughly estimates how often CPU was handling synchronizations due to False Sharing. F…
378 …"BriefDescription": "This metric estimates how often CPU was stalled due to Streaming store memor…
382 …"PublicDescription": "This metric estimates how often CPU was stalled due to Streaming store memo…
430 …c estimates fraction of cycles the CPU performance was potentially limited due to Core computation…
434 …c estimates fraction of cycles the CPU performance was potentially limited due to Core computation…
448 …is metric represents fraction of cycles the CPU issue-pipeline was stalled due to serializing oper…
452 …is metric represents fraction of cycles the CPU issue-pipeline was stalled due to serializing oper…
457 …"BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to PAUSE In…
461 …"PublicDescription": "This metric represents fraction of cycles the CPU was stalled due to PAUSE I…
466 …"BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to LFENCE I…
487 …due to heavy data-dependency among software instructions; or over oversubscribing a particular har…
580 …CPU has executed (retired). Note this metric's value may exceed its parent due to use of \"Uops\" …
598 …loating-point (FP) scalar uops fraction the CPU has retired. May overcount due to FMA double count…
607 …ion the CPU has retired aggregated across all vector widths. May overcount due to FMA double count…
616 … uops fraction the CPU has retired for 128-bit wide vectors. May overcount due to FMA double count…
625 … uops fraction the CPU has retired for 256-bit wide vectors. May overcount due to FMA double count…
634 …s and shuffles are counted. Note this metric's value may exceed its parent due to use of \"Uops\" …
698 …cuted - remaining means not covered by other sibling nodes. May undercount due to FMA double count…
901 …n units (regardless of precision or vector-width). Values > 1 are possible due to ([BDW+] Fused-Mu…
979 …ic instruction (lower number means higher occurrence rate). May undercount due to FMA double count…
987 …on instruction (lower number means higher occurrence rate). May undercount due to FMA double count…
995 …on instruction (lower number means higher occurrence rate). May undercount due to FMA double count…
1003 …it instruction (lower number means higher occurrence rate). May undercount due to FMA double count…
1011 …it instruction (lower number means higher occurrence rate). May undercount due to FMA double count…
1360 …: "Counts the number of issue slots that were not consumed by the backend due to frontend stalls.…
1368 …f issue slots that were not delivered by the frontend due to frontend bandwidth restrictions due …
1376 …"Counts the number of issue slots that were not delivered by the frontend due to instruction cach…
1384 …"Counts the number of issue slots that were not delivered by the frontend due to Instruction Tabl…
1392 …"Counts the number of issue slots that were not delivered by the frontend due to BACLEARS, which …
1396 …due to BACLEARS, which occurs when the Branch Target Buffer (BTB) prediction or lack thereof, was …
1401 …"Counts the number of issue slots that were not delivered by the frontend due to BTCLEARS, which …
1409 …f issue slots that were not delivered by the frontend due to frontend bandwidth restrictions due …
1417 …"Counts the number of issue slots that were not delivered by the frontend due to the microcode se…
1425 … "Counts the number of issue slots that were not delivered by the frontend due to decode stalls.",
1433 …"Counts the number of issue slots that were not delivered by the frontend due to wrong predecodes…
1441 …"Counts the number of issue slots that were not delivered by the frontend due to other common fro…
1449 … slots that were not consumed by the backend because allocation is stalled due to a mispredicted j…
1453 … backend because allocation is stalled due to a mispredicted jump or a machine clear. Only issue s…
1458 …: "Counts the number of issue slots that were not consumed by the backend due to branch mispredic…
1466 … slots that were not consumed by the backend because allocation is stalled due to a machine clear …
1474 …: "Counts the number of issue slots that were not consumed by the backend due to a machine clear …
1482 …cription": "Counts the number of machine clears relative to the number of nuke slots due to SMC. ",
1490 … "Counts the number of machine clears relative to the number of nuke slots due to memory ordering.…
1498 …n": "Counts the number of machine clears relative to the number of nuke slots due to FP assists. ",
1506 … "Counts the number of machine clears relative to the number of nuke slots due to memory disambigu…
1514 …": "Counts the number of machine clears relative to the number of nuke slots due to page faults. ",
1522 …ssue slots that were not consumed by the backend due to a machine clear classified as a fast nuke…
1530 …unts the total number of issue slots that were not consumed by the backend due to backend stalls",
1534 …due to backend stalls. Note that uops must be available for consumption in order for this event t…
1539 …"BriefDescription": "Counts the number of cycles due to backend bound stalls that are core executi…
1547 … "BriefDescription": "Counts the number of cycles the core is stalled due to stores or loads. ",
1555 … "BriefDescription": "Counts the number of cycles the core is stalled due to store buffer full.",
1563 …r of cycles that the oldest load of the load buffer is stalled at retirement due to a load block.",
1571 …of cycles that the oldest load of the load buffer is stalled at retirement due to a store forward …
1579 …of cycles that the oldest load of the load buffer is stalled at retirement due to a first level TL…
1587 …of cycles that the oldest load of the load buffer is stalled at retirement due to a second level T…
1595 …of cycles that the oldest load of the load buffer is stalled at retirement due to a number of othe…
1603 …"BriefDescription": "Counts the number of cycles a core is stalled due to a demand load which hit …
1611 …"BriefDescription": "Counts the number of cycles a core is stalled due to a demand load which hit …
1619 …"BriefDescription": "Counts the number of cycles the core is stalled due to a demand load miss whi…
1627 …"BriefDescription": "Counts the number of cycles the core is stalled due to a demand load miss whi…
1635 …unts the total number of issue slots that were not consumed by the backend due to backend stalls",
1639 …due to backend stalls. Note that UOPS must be available for consumption in order for this event t…
1644 …unts the total number of issue slots that were not consumed by the backend due to backend stalls",
1648 …nts the total number of issue slots that were not consumed by the backend due to backend stalls. …
1653 …: "Counts the number of issue slots that were not consumed by the backend due to memory reservati…
1661 …, relative to the number of mem_scheduler slots, in which uops are blocked due to store buffer ful…
1669 …, relative to the number of mem_scheduler slots, in which uops are blocked due to load buffer full…
1677 …, relative to the number of mem_scheduler slots, in which uops are blocked due to RSV full relativ…
1685 …f issue slots that were not consumed by the backend due to IEC or FPC RAT stalls, which can be du…
1693 …: "Counts the number of issue slots that were not consumed by the backend due to the physical reg…
1701 …: "Counts the number of issue slots that were not consumed by the backend due to the reorder buff…
1709 …: "Counts the number of issue slots that were not consumed by the backend due to certain allocati…
1717 …: "Counts the number of issue slots that were not consumed by the backend due to scoreboards from…
1761 …x flows issued by the micro-sequencer (MS). This includes uops from flows due to complex instruct…