Lines Matching full:due
30 …ded either shared or modified data from another core's L2/L3 on the same chip due to a marked load"
35 …into the TLB from another chip's L4 on a different Node or Group (Distant) due to a marked data si…
40 … Table Entry was loaded into the TLB from local core's L2 without conflict due to a data side requ…
80 …nto the TLB with Modified (M) data from another core's L2 on the same chip due to a marked data si…
90 …he was reloaded from another chip's L4 on a different Node or Group (Distant) due to a demand load"
95 …nto the TLB with Modified (M) data from another core's L2 on the same chip due to a data side requ…
115 …the TLB from local core's L3 without dispatch conflicts hit on Mepf state. due to a marked data si…
145 …"BriefDescription": "Ict empty for this thread due to icache misses that were sourced from beyond …
150 "BriefDescription": "Dispatch held due to a synchronizing instruction at dispatch"
155 "BriefDescription": "Ict empty for this thread due to Icache Miss"
160 …ied data from another core's L2/L3 on a different chip (remote or distant) due to a marked data si…
175 … Entry was loaded into the TLB from local core's L3 with dispatch conflict due to a data side requ…
180 … Table Entry was loaded into the TLB from local core's L2 without conflict due to a marked data si…
190 …from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load"
210 "BriefDescription": "Ict empty for this thread due to Icache Miss and branch mispred"
225 … Table Entry was loaded into the TLB from local core's L3 without conflict due to a marked data si…
235 …from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a demand load"
250 …m another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a data side requ…
260 …m another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a data side requ…
265 …nto the TLB from another chip's memory on the same Node or Group (Distant) due to a marked data si…
270 …the TLB from local core's L3 without dispatch conflicts hit on Mepf state. due to a data side requ…
285 …e was reloaded from another chip's memory on the same Node or Group (Distant) due to a demand load"
305 …cles to reload with Modified (M) data from another core's L2 on the same chip due to a marked load"
310 …m another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked data si…
325 …from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load"
330 …"BriefDescription": "Ict empty for this thread due to icache misses that were sourced from the loc…
350 … reloaded from a memory location including L4 from local remote or distant due to an instruction f…
380 …other chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked data si…
385 "BriefDescription": "Ict empty for this thread due to branch mispred"
390 … either shared or modified data from another core's L2/L3 on the same chip due to a marked data si…
395 … into the TLB with Shared (S) data from another core's L2 on the same chip due to a data side requ…
400 …nto the TLB with Modified (M) data from another core's L3 on the same chip due to a marked data si…
435 …che was reloaded with Shared (S) data from another core's L2 on the same chip due to a marked load"
450 …"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 due to a mark…
480 …s reloaded from local core's L2 hit without dispatch conflicts on Mepf state. due to a marked load"
490 …o the TLB from a memory location including L4 from local remote or distant due to a marked data si…
515 …che was reloaded with Shared (S) data from another core's L3 on the same chip due to a marked load"
530 …cycles to reload with Shared (S) data from another core's L2 on the same chip due to a marked load"