Lines Matching full:side
29 …r chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a data side request",
35 …r chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a data side request",
41 …ion": "A Page Table Entry was loaded into the TLB from local core's L2 due to a data side request",
47 …was loaded into the TLB from a location other than the local core's L2 due to a data side request",
53 …TLB from local core's L2 hit without dispatch conflicts on Mepf state. due to a data side request",
59 …le Entry was loaded into the TLB from local core's L2 without conflict due to a data side request",
65 …ion": "A Page Table Entry was loaded into the TLB from local core's L3 due to a data side request",
71 …ry was loaded into the TLB from local core's L3 with dispatch conflict due to a data side request",
77 …TLB from local core's L3 without dispatch conflicts hit on Mepf state. due to a data side request",
83 …le Entry was loaded into the TLB from local core's L3 without conflict due to a data side request",
89 …age Table Entry was loaded into the TLB from the local chip's L4 cache due to a data side request",
95 … Page Table Entry was loaded into the TLB from the local chip's Memory due to a data side request",
101 …e TLB from a memory location including L4 from local remote or distant due to a data side request",
107 …data from another core's L2/L3 on a different chip (remote or distant) due to a data side request",
113 …her shared or modified data from another core's L2/L3 on the same chip due to a data side request",
119 …other chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a data side request",
125 …other chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a data side request",
131 …nto the TLB from another chip's L4 on the same Node or Group ( Remote) due to a data side request",