Lines Matching full:instruction

30     "BriefDescription": "Cycles in which an instruction reload is pending to satisfy a demand miss."
45 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline finished at dispatch a…
60 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a lwsync waiting t…
65 …"BriefDescription": "A branch instruction finished. Includes predicted/mispredicted/unconditional."
70 …"BriefDescription": "Simple fixed point instruction issued to the store unit. Measured at finish t…
80 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was dispatched but not…
95 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline required special handl…
100 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
115 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was executing in the V…
120 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a stcx waiting for…
125 …instruction in the pipeline was executing in any unit before it was flushed. Note that if the flus…
130 …"BriefDescription": "The marked instruction was simple fixed point that was issued to the store un…
135 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline (NTC) finishes. Note t…
150 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting to finish …
175 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for the no…
180 …efDescription": "Cycles in which the oldest instruction in the pipeline was a simple fixed point i…
185 …t instruction in the pipeline was not allowed to complete because it was interrupted by ANY except…
210     "BriefDescription": "A fixed point instruction was issued to the VSU."
225 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline suffered an ERAT miss …
230 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline cannot complete becaus…
240 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was executing in the B…
245 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a hwsync waiting f…
250 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a TLBIEL instructi…
255 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline completed without an n…
260     "BriefDescription": "VSU instruction was issued to VSU pipe 3."
265     "BriefDescription": "LSU marked instruction finish."