Lines Matching full:instruction

35 …instruction. It starts counting when the operation starts to drain to the L2 and it stops counting…
45     "BriefDescription": "Marked Instruction suffered an icache Miss."
55 …ompleted. Includes any type. It counts once for each 1, 2, 4 or 8 flop instruction. Use PM_1|2|4|8…
80 …"BriefDescription": "Conditional store instruction (STCX) finished. LARX and STCX are instructions…
85 …"BriefDescription": "An instruction was marked at decode time. Random Instruction Sampling (RIS) o…
90 …"BriefDescription": "The marked instruction was a decimal floating point operation issued to the V…
95 …"BriefDescription": "The marked instruction was a fixed point operation issued to the VSU. Measure…
100 …"BriefDescription": "At least one VSU instruction was issued to one of the VSU pipes. Up to 4 per …
145 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
175 …"BriefDescription": "The marked instruction was dependent on a load. It is eligible for issue kill…
180     "BriefDescription": "Marked Start probe nop dispatched. Instruction AND R0,R0,R0."
190 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
220 …Cycles spent in the core portion of a marked Stcx instruction. It starts counting when the instruc…
250     "BriefDescription": "The marked instruction was flushed."
255 …ocessor's instruction cache was reloaded from a source other than the local core's L1, L2, or L3 d…