Lines Matching full:was
25 …"BriefDescription": "Cycles when dispatch was stalled for this thread because the MMU was handling…
30 …"BriefDescription": "Cycles when dispatch was stalled while the instruction was fetched from the l…
40 …n which the NTC instruction is held at dispatch because the STF mapper/SRB was full. Includes GPR …
45 …"BriefDescription": "The PTE required by the instruction was resident in the TLB (data TLB access)…
50 …"BriefDescription": "Cycles when dispatch was stalled while the instruction was fetched from the l…
90 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was executing in the L…
95 …"BriefDescription": "Cycles when dispatch was stalled while waiting to resolve an instruction ERAT…
100 …"BriefDescription": "Cycles when dispatch was stalled while the instruction was fetched from the l…
105 "BriefDescription": "Cycles when dispatch was stalled for this thread due to an Icache Miss."
110 …"BriefDescription": "Cycles when dispatch was stalled for this thread because Fetch was being held…
115 …n": "Cycles in which the NTC instruction is held at dispatch because the XVFC mapper/SRB was full."
120 …"BriefDescription": "For a marked data transfer instruction, the processor's L1 data cache was rel…
130 …"BriefDescription": "An instruction issued and the issue was later cancelled. Only one cancel per …
140 …iefDescription": "Cycles when dispatch was stalled because of a flush that happened to an instruct…
145 …"BriefDescription": "Cycles when dispatch was stalled while waiting to resolve an instruction TLB …
150 …"BriefDescription": "The instruction that was next to complete (oldest in the pipeline) did not co…
155 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a store instructio…
165 …which the oldest instruction in the pipeline was a store whose cache line was not resident in the …
180 …"BriefDescription": "Cycles when dispatch was stalled after a mispredicted branch resulted in an i…
185 …es in which the NTC instruction is held at dispatch because the mapper/SRB was full. Includes GPR …
190 …"BriefDescription": "Cycles when dispatch was stalled while the instruction was fetched from the l…
205 …"BriefDescription": "The processor's instruction cache was reloaded from a source other than the l…
220 …"BriefDescription": "Cycles when dispatch was stalled while the instruction was fetched from sourc…
225 …"BriefDescription": "Cycles when dispatch was stalled for this thread due to a mispredicted branch…
230 …"BriefDescription": "Cycles when dispatch was stalled while the instruction was fetched from any s…