1 // SPDX-License-Identifier: GPL-2.0-only
5  * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
40 	{ .compatible = "st,stm32f4-sai", .data = (void *)&stm32_sai_conf_f4 },
41 	{ .compatible = "st,stm32h7-sai", .data = (void *)&stm32_sai_conf_h7 },
49 	clk_disable_unprepare(sai->pclk);  in stm32_sai_pclk_disable()
59 	ret = clk_prepare_enable(sai->pclk);  in stm32_sai_pclk_enable()
61 		dev_err(&sai->pdev->dev, "failed to enable clock: %d\n", ret);  in stm32_sai_pclk_enable()
73 	ret = stm32_sai_pclk_enable(&sai->pdev->dev);  in stm32_sai_sync_conf_client()
77 	writel_relaxed(FIELD_PREP(SAI_GCR_SYNCIN_MASK, (synci - 1)), sai->base);  in stm32_sai_sync_conf_client()
79 	stm32_sai_pclk_disable(&sai->pdev->dev);  in stm32_sai_sync_conf_client()
90 	ret = stm32_sai_pclk_enable(&sai->pdev->dev);  in stm32_sai_sync_conf_provider()
94 	dev_dbg(&sai->pdev->dev, "Set %pOFn%s as synchro provider\n",  in stm32_sai_sync_conf_provider()
95 		sai->pdev->dev.of_node,  in stm32_sai_sync_conf_provider()
98 	prev_synco = FIELD_GET(SAI_GCR_SYNCOUT_MASK, readl_relaxed(sai->base));  in stm32_sai_sync_conf_provider()
100 		dev_err(&sai->pdev->dev, "%pOFn%s already set as sync provider\n",  in stm32_sai_sync_conf_provider()
101 			sai->pdev->dev.of_node,  in stm32_sai_sync_conf_provider()
103 		stm32_sai_pclk_disable(&sai->pdev->dev);  in stm32_sai_sync_conf_provider()
104 		return -EINVAL;  in stm32_sai_sync_conf_provider()
107 	writel_relaxed(FIELD_PREP(SAI_GCR_SYNCOUT_MASK, synco), sai->base);  in stm32_sai_sync_conf_provider()
109 	stm32_sai_pclk_disable(&sai->pdev->dev);  in stm32_sai_sync_conf_provider()
123 		dev_err(&sai_client->pdev->dev,  in stm32_sai_set_sync()
126 		return -ENODEV;  in stm32_sai_set_sync()
131 		dev_err(&sai_client->pdev->dev,  in stm32_sai_set_sync()
133 		ret = -EINVAL;  in stm32_sai_set_sync()
146 	put_device(&pdev->dev);  in stm32_sai_set_sync()
154 	struct reset_control *rst;  in stm32_sai_probe()  local
159 	sai = devm_kzalloc(&pdev->dev, sizeof(*sai), GFP_KERNEL);  in stm32_sai_probe()
161 		return -ENOMEM;  in stm32_sai_probe()
163 	sai->base = devm_platform_ioremap_resource(pdev, 0);  in stm32_sai_probe()
164 	if (IS_ERR(sai->base))  in stm32_sai_probe()
165 		return PTR_ERR(sai->base);  in stm32_sai_probe()
167 	of_id = of_match_device(stm32_sai_ids, &pdev->dev);  in stm32_sai_probe()
169 		memcpy(&sai->conf, (const struct stm32_sai_conf *)of_id->data,  in stm32_sai_probe()
172 		return -EINVAL;  in stm32_sai_probe()
175 		sai->pclk = devm_clk_get(&pdev->dev, "pclk");  in stm32_sai_probe()
176 		if (IS_ERR(sai->pclk))  in stm32_sai_probe()
177 			return dev_err_probe(&pdev->dev, PTR_ERR(sai->pclk),  in stm32_sai_probe()
181 	sai->clk_x8k = devm_clk_get(&pdev->dev, "x8k");  in stm32_sai_probe()
182 	if (IS_ERR(sai->clk_x8k))  in stm32_sai_probe()
183 		return dev_err_probe(&pdev->dev, PTR_ERR(sai->clk_x8k),  in stm32_sai_probe()
186 	sai->clk_x11k = devm_clk_get(&pdev->dev, "x11k");  in stm32_sai_probe()
187 	if (IS_ERR(sai->clk_x11k))  in stm32_sai_probe()
188 		return dev_err_probe(&pdev->dev, PTR_ERR(sai->clk_x11k),  in stm32_sai_probe()
192 	sai->irq = platform_get_irq(pdev, 0);  in stm32_sai_probe()
193 	if (sai->irq < 0)  in stm32_sai_probe()
194 		return sai->irq;  in stm32_sai_probe()
197 	rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);  in stm32_sai_probe()
198 	if (IS_ERR(rst))  in stm32_sai_probe()
199 		return dev_err_probe(&pdev->dev, PTR_ERR(rst),  in stm32_sai_probe()
202 	reset_control_assert(rst);  in stm32_sai_probe()
204 	reset_control_deassert(rst);  in stm32_sai_probe()
207 	ret = clk_prepare_enable(sai->pclk);  in stm32_sai_probe()
209 		dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);  in stm32_sai_probe()
214 			readl_relaxed(sai->base + STM_SAI_IDR));  in stm32_sai_probe()
216 		val = readl_relaxed(sai->base + STM_SAI_HWCFGR);  in stm32_sai_probe()
217 		sai->conf.fifo_size = FIELD_GET(SAI_HWCFGR_FIFO_SIZE, val);  in stm32_sai_probe()
218 		sai->conf.has_spdif_pdm = !!FIELD_GET(SAI_HWCFGR_SPDIF_PDM,  in stm32_sai_probe()
221 		val = readl_relaxed(sai->base + STM_SAI_VERR);  in stm32_sai_probe()
222 		sai->conf.version = val;  in stm32_sai_probe()
224 		dev_dbg(&pdev->dev, "SAI version: %lu.%lu registered\n",  in stm32_sai_probe()
228 	clk_disable_unprepare(sai->pclk);  in stm32_sai_probe()
230 	sai->pdev = pdev;  in stm32_sai_probe()
231 	sai->set_sync = &stm32_sai_set_sync;  in stm32_sai_probe()
234 	return devm_of_platform_populate(&pdev->dev);  in stm32_sai_probe()
239  * When pins are shared by two sai sub instances, pins have to be defined
240  * in sai parent node. In this case, pins state is not managed by alsa fw.
241  * These pins are managed in suspend/resume callbacks.
252 	sai->gcr = readl_relaxed(sai->base);  in stm32_sai_suspend()
267 	writel_relaxed(sai->gcr, sai->base);  in stm32_sai_resume()
282 		.name = "st,stm32-sai",
293 MODULE_ALIAS("platform:st,stm32-sai");