Lines Matching full:instruction

24  * Instruction Set Architecture (ISA) Reference Manual
27 	{0, "IllegalInstructionCause", "Illegal instruction"},
28 	{1, "SyscallCause", "SYSCALL instruction"},
30 	"Processor internal physical address or data error during instruction fetch"},
36 	"MOVSP instruction, if caller’s registers are not in the register file"},
43 	"PIF data error during instruction fetch"},
47 	"PIF address error during instruction fetch"},
50 	{16, "InstTLBMissCause", "Error during Instruction TLB refill"},
52 	"Multiple instruction TLB entries matched"},
54 	"An instruction fetch referenced a virtual address at a ring level less than CRING"},
56 …"An instruction fetch referenced a page mapped with an attribute that does not permit instruction …
66 	"Coprocessor 0 instruction when cp0 disabled"},
68 	"Coprocessor 1 instruction when cp1 disabled"},
70 	"Coprocessor 2 instruction when cp2 disabled"},
72 	"Coprocessor 3 instruction when cp3 disabled"},
74 	"Coprocessor 4 instruction when cp4 disabled"},
76 	"Coprocessor 5 instruction when cp5 disabled"},
78 	"Coprocessor 6 instruction when cp6 disabled"},
80 	"Coprocessor 7 instruction when cp7 disabled"},