129 	struct mtk_adsp_chip_info *adsp = data;  in platform_parse_resource()  local
166 	adsp->pa_dram = (phys_addr_t)res.start;  in platform_parse_resource()
167 	if (adsp->pa_dram & DRAM_REMAP_MASK) {  in platform_parse_resource()
168 		dev_err(dev, "adsp memory(%#x) is not 4K-aligned\n",  in platform_parse_resource()
169 			(u32)adsp->pa_dram);  in platform_parse_resource()
173 	adsp->dramsize = resource_size(&res);  in platform_parse_resource()
174 	if (adsp->dramsize < TOTAL_SIZE_SHARED_DRAM_FROM_TAIL) {  in platform_parse_resource()
175 		dev_err(dev, "adsp memory(%#x) is not enough for share\n",  in platform_parse_resource()
176 			adsp->dramsize);  in platform_parse_resource()
180 	dev_dbg(dev, "dram pbase=%pa size=%#x\n", &adsp->pa_dram, adsp->dramsize);  in platform_parse_resource()
184 		dev_err(dev, "no ADSP-CFG register resource\n");  in platform_parse_resource()
188 	adsp->va_cfgreg = devm_ioremap_resource(dev, mmio);  in platform_parse_resource()
189 	if (IS_ERR(adsp->va_cfgreg))  in platform_parse_resource()
190 		return PTR_ERR(adsp->va_cfgreg);  in platform_parse_resource()
192 	adsp->pa_cfgreg = (phys_addr_t)mmio->start;  in platform_parse_resource()
193 	adsp->cfgregsize = resource_size(mmio);  in platform_parse_resource()
195 	dev_dbg(dev, "cfgreg pbase=%pa size=%#x\n", &adsp->pa_cfgreg, adsp->cfgregsize);  in platform_parse_resource()
203 	adsp->pa_sram = (phys_addr_t)mmio->start;  in platform_parse_resource()
204 	adsp->sramsize = resource_size(mmio);  in platform_parse_resource()
206 	dev_dbg(dev, "sram pbase=%pa size=%#x\n", &adsp->pa_sram, adsp->sramsize);  in platform_parse_resource()
214 	adsp->va_secreg = devm_ioremap_resource(dev, mmio);  in platform_parse_resource()
215 	if (IS_ERR(adsp->va_secreg))  in platform_parse_resource()
216 		return PTR_ERR(adsp->va_secreg);  in platform_parse_resource()
218 	adsp->pa_secreg = (phys_addr_t)mmio->start;  in platform_parse_resource()
219 	adsp->secregsize = resource_size(mmio);  in platform_parse_resource()
221 	dev_dbg(dev, "secreg pbase=%pa size=%#x\n", &adsp->pa_secreg, adsp->secregsize);  in platform_parse_resource()
229 	adsp->va_busreg = devm_ioremap_resource(dev, mmio);  in platform_parse_resource()
230 	if (IS_ERR(adsp->va_busreg))  in platform_parse_resource()
231 		return PTR_ERR(adsp->va_busreg);  in platform_parse_resource()
233 	adsp->pa_busreg = (phys_addr_t)mmio->start;  in platform_parse_resource()
234 	adsp->busregsize = resource_size(mmio);  in platform_parse_resource()
236 	dev_dbg(dev, "busreg pbase=%pa size=%#x\n", &adsp->pa_busreg, adsp->busregsize);  in platform_parse_resource()
254 static int adsp_memory_remap_init(struct snd_sof_dev *sdev, struct mtk_adsp_chip_info *adsp)  in adsp_memory_remap_init()  argument
258 	offset = adsp->pa_dram - DRAM_PHYS_BASE_FROM_DSP_VIEW;  in adsp_memory_remap_init()
259 	adsp->dram_offset = offset;  in adsp_memory_remap_init()
262 	dev_dbg(sdev->dev, "adsp->pa_dram %pa, offset %#x\n", &adsp->pa_dram, offset);  in adsp_memory_remap_init()
279 	struct mtk_adsp_chip_info *adsp = data;  in adsp_shared_base_ioremap()  local
284 	adsp->pa_shared_dram = adsp->pa_dram + adsp->dramsize - shared_size;  in adsp_shared_base_ioremap()
285 	if (adsp->va_dram) {  in adsp_shared_base_ioremap()
286 		adsp->shared_dram = adsp->va_dram + DSP_DRAM_SIZE - shared_size;  in adsp_shared_base_ioremap()
288 		adsp->shared_dram = devm_ioremap(dev, adsp->pa_shared_dram,  in adsp_shared_base_ioremap()
290 		if (!adsp->shared_dram) {  in adsp_shared_base_ioremap()
296 		adsp->shared_dram, &adsp->pa_shared_dram, shared_size);  in adsp_shared_base_ioremap()
326 	priv->adsp = devm_kzalloc(&pdev->dev, sizeof(struct mtk_adsp_chip_info), GFP_KERNEL);  in mt8186_dsp_probe()
327 	if (!priv->adsp)  in mt8186_dsp_probe()
330 	ret = platform_parse_resource(pdev, priv->adsp);  in mt8186_dsp_probe()
335 						       priv->adsp->pa_sram,  in mt8186_dsp_probe()
336 						       priv->adsp->sramsize);  in mt8186_dsp_probe()
339 			&priv->adsp->pa_sram, priv->adsp->sramsize);  in mt8186_dsp_probe()
344 							  priv->adsp->pa_dram,  in mt8186_dsp_probe()
345 							  priv->adsp->dramsize);  in mt8186_dsp_probe()
348 			&priv->adsp->pa_dram, priv->adsp->dramsize);  in mt8186_dsp_probe()
352 	priv->adsp->va_dram = sdev->bar[SOF_FW_BLK_TYPE_SRAM];  in mt8186_dsp_probe()
354 	ret = adsp_shared_base_ioremap(pdev, priv->adsp);  in mt8186_dsp_probe()
360 	sdev->bar[DSP_REG_BAR] = priv->adsp->va_cfgreg;  in mt8186_dsp_probe()
361 	sdev->bar[DSP_SECREG_BAR] = priv->adsp->va_secreg;  in mt8186_dsp_probe()
362 	sdev->bar[DSP_BUSREG_BAR] = priv->adsp->va_busreg;  in mt8186_dsp_probe()
370 	ret = adsp_memory_remap_init(sdev, priv->adsp);  in mt8186_dsp_probe()
376 	/* enable adsp clock before touching registers */  in mt8186_dsp_probe()
391 	priv->ipc_dev = platform_device_register_data(&pdev->dev, "mtk-adsp-ipc",  in mt8186_dsp_probe()
396 		dev_err(sdev->dev, "failed to create mtk-adsp-ipc device\n");  in mt8186_dsp_probe()