Lines Matching refs:sdev

27 static void hda_ssp_set_cbp_cfp(struct snd_sof_dev *sdev)  in hda_ssp_set_cbp_cfp()  argument
29 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_ssp_set_cbp_cfp()
35 snd_sof_dsp_update_bits_unlocked(sdev, HDA_DSP_BAR, in hda_ssp_set_cbp_cfp()
44 struct hdac_ext_stream *hda_cl_stream_prepare(struct snd_sof_dev *sdev, unsigned int format, in hda_cl_stream_prepare() argument
50 struct pci_dev *pci = to_pci_dev(sdev->dev); in hda_cl_stream_prepare()
53 hext_stream = hda_dsp_stream_get(sdev, direction, 0); in hda_cl_stream_prepare()
56 dev_err(sdev->dev, "error: no stream available\n"); in hda_cl_stream_prepare()
65 dev_err(sdev->dev, "error: memory alloc failed: %d\n", ret); in hda_cl_stream_prepare()
74 ret = hda_dsp_iccmax_stream_hw_params(sdev, hext_stream, dmab, NULL); in hda_cl_stream_prepare()
76 dev_err(sdev->dev, "error: iccmax stream prepare failed: %d\n", ret); in hda_cl_stream_prepare()
80 ret = hda_dsp_stream_hw_params(sdev, hext_stream, dmab, NULL); in hda_cl_stream_prepare()
82 dev_err(sdev->dev, "error: hdac prepare failed: %d\n", ret); in hda_cl_stream_prepare()
85 hda_dsp_stream_spib_config(sdev, hext_stream, HDA_DSP_SPIB_ENABLE, size); in hda_cl_stream_prepare()
93 hda_dsp_stream_put(sdev, direction, hstream->stream_tag); in hda_cl_stream_prepare()
102 int cl_dsp_init(struct snd_sof_dev *sdev, int stream_tag, bool imr_boot) in cl_dsp_init() argument
104 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in cl_dsp_init()
113 ret = hda_dsp_core_power_up(sdev, chip->host_managed_cores_mask); in cl_dsp_init()
116 dev_err(sdev->dev, "error: dsp core 0/1 power up failed\n"); in cl_dsp_init()
120 hda_ssp_set_cbp_cfp(sdev); in cl_dsp_init()
127 snd_sof_dsp_write(sdev, HDA_DSP_BAR, chip->ipc_req, ipc_hdr); in cl_dsp_init()
130 ret = hda_dsp_core_run(sdev, chip->init_core_mask); in cl_dsp_init()
133 dev_err(sdev->dev, in cl_dsp_init()
140 ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, in cl_dsp_init()
149 dev_err(sdev->dev, in cl_dsp_init()
156 snd_sof_dsp_update_bits_forced(sdev, HDA_DSP_BAR, in cl_dsp_init()
162 ret = hda_dsp_core_reset_power_down(sdev, chip->host_managed_cores_mask & in cl_dsp_init()
166 dev_err(sdev->dev, in cl_dsp_init()
172 hda_dsp_ipc_int_enable(sdev); in cl_dsp_init()
184 ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, in cl_dsp_init()
192 sdev->enabled_cores_mask |= chip->init_core_mask; in cl_dsp_init()
193 mask = sdev->enabled_cores_mask; in cl_dsp_init()
195 sdev->dsp_core_ref_count[j]++; in cl_dsp_init()
200 dev_err(sdev->dev, in cl_dsp_init()
213 snd_sof_dsp_dbg_dump(sdev, dump_msg, flags); in cl_dsp_init()
214 hda_dsp_core_reset_power_down(sdev, chip->host_managed_cores_mask); in cl_dsp_init()
220 static int cl_trigger(struct snd_sof_dev *sdev, in cl_trigger() argument
229 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, in cl_trigger()
233 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, in cl_trigger()
243 return hda_dsp_stream_trigger(sdev, hext_stream, cmd); in cl_trigger()
247 int hda_cl_cleanup(struct snd_sof_dev *sdev, struct snd_dma_buffer *dmab, in hda_cl_cleanup() argument
255 ret = hda_dsp_stream_spib_config(sdev, hext_stream, HDA_DSP_SPIB_DISABLE, 0); in hda_cl_cleanup()
257 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, sd_offset, in hda_cl_cleanup()
260 hda_dsp_stream_put(sdev, hstream->direction, hstream->stream_tag); in hda_cl_cleanup()
265 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, in hda_cl_cleanup()
267 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, in hda_cl_cleanup()
270 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, sd_offset, 0); in hda_cl_cleanup()
279 int hda_cl_copy_fw(struct snd_sof_dev *sdev, struct hdac_ext_stream *hext_stream) in hda_cl_copy_fw() argument
281 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_cl_copy_fw()
286 ret = cl_trigger(sdev, hext_stream, SNDRV_PCM_TRIGGER_START); in hda_cl_copy_fw()
288 dev_err(sdev->dev, "error: DMA trigger start failed\n"); in hda_cl_copy_fw()
292 status = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, in hda_cl_copy_fw()
304 dev_err(sdev->dev, in hda_cl_copy_fw()
309 ret = cl_trigger(sdev, hext_stream, SNDRV_PCM_TRIGGER_STOP); in hda_cl_copy_fw()
311 dev_err(sdev->dev, "error: DMA trigger stop failed\n"); in hda_cl_copy_fw()
319 int hda_dsp_cl_boot_firmware_iccmax(struct snd_sof_dev *sdev) in hda_dsp_cl_boot_firmware_iccmax() argument
321 struct snd_sof_pdata *plat_data = sdev->pdata; in hda_dsp_cl_boot_firmware_iccmax()
323 struct hdac_bus *bus = sof_to_bus(sdev); in hda_dsp_cl_boot_firmware_iccmax()
333 dev_err(sdev->dev, "error: firmware size must be greater than firmware offset\n"); in hda_dsp_cl_boot_firmware_iccmax()
340 iccmax_stream = hda_cl_stream_prepare(sdev, HDA_CL_STREAM_FORMAT, stripped_firmware.size, in hda_dsp_cl_boot_firmware_iccmax()
343 dev_err(sdev->dev, "error: dma prepare for ICCMAX stream failed\n"); in hda_dsp_cl_boot_firmware_iccmax()
347 ret = hda_dsp_cl_boot_firmware(sdev); in hda_dsp_cl_boot_firmware_iccmax()
353 ret1 = hda_cl_cleanup(sdev, &dmab_bdl, iccmax_stream); in hda_dsp_cl_boot_firmware_iccmax()
355 dev_err(sdev->dev, "error: ICCMAX stream cleanup failed\n"); in hda_dsp_cl_boot_firmware_iccmax()
368 static int hda_dsp_boot_imr(struct snd_sof_dev *sdev) in hda_dsp_boot_imr() argument
373 chip_info = get_chip_info(sdev->pdata); in hda_dsp_boot_imr()
375 ret = chip_info->cl_init(sdev, 0, true); in hda_dsp_boot_imr()
380 hda_sdw_process_wakeen(sdev); in hda_dsp_boot_imr()
385 int hda_dsp_cl_boot_firmware(struct snd_sof_dev *sdev) in hda_dsp_cl_boot_firmware() argument
387 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_cl_boot_firmware()
388 struct snd_sof_pdata *plat_data = sdev->pdata; in hda_dsp_cl_boot_firmware()
396 if (hda->imrboot_supported && !sdev->first_boot && !hda->skip_imr_boot) { in hda_dsp_cl_boot_firmware()
397 dev_dbg(sdev->dev, "IMR restore supported, booting from IMR directly\n"); in hda_dsp_cl_boot_firmware()
399 ret = hda_dsp_boot_imr(sdev); in hda_dsp_cl_boot_firmware()
403 dev_warn(sdev->dev, "IMR restore failed, trying to cold boot\n"); in hda_dsp_cl_boot_firmware()
409 dev_err(sdev->dev, "error: firmware size must be greater than firmware offset\n"); in hda_dsp_cl_boot_firmware()
417 init_waitqueue_head(&sdev->boot_wait); in hda_dsp_cl_boot_firmware()
420 hext_stream = hda_cl_stream_prepare(sdev, HDA_CL_STREAM_FORMAT, in hda_dsp_cl_boot_firmware()
424 dev_err(sdev->dev, "error: dma prepare for fw loading failed\n"); in hda_dsp_cl_boot_firmware()
433 dev_dbg(sdev->dev, in hda_dsp_cl_boot_firmware()
438 ret = chip_info->cl_init(sdev, hext_stream->hstream.stream_tag, false); in hda_dsp_cl_boot_firmware()
448 dev_err(sdev->dev, "error: dsp init failed after %d attempts with err: %d\n", in hda_dsp_cl_boot_firmware()
468 if (!sdev->first_boot) in hda_dsp_cl_boot_firmware()
469 hda_sdw_process_wakeen(sdev); in hda_dsp_cl_boot_firmware()
479 ret = hda_cl_copy_fw(sdev, hext_stream); in hda_dsp_cl_boot_firmware()
481 dev_dbg(sdev->dev, "Firmware download successful, booting...\n"); in hda_dsp_cl_boot_firmware()
484 snd_sof_dsp_dbg_dump(sdev, "Firmware download failed", in hda_dsp_cl_boot_firmware()
495 ret1 = hda_cl_cleanup(sdev, &dmab, hext_stream); in hda_dsp_cl_boot_firmware()
497 dev_err(sdev->dev, "error: Code loader DSP cleanup failed\n"); in hda_dsp_cl_boot_firmware()
512 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, in hda_dsp_cl_boot_firmware()
519 int hda_dsp_pre_fw_run(struct snd_sof_dev *sdev) in hda_dsp_pre_fw_run() argument
522 return hda_dsp_ctrl_clock_power_gating(sdev, false); in hda_dsp_pre_fw_run()
526 int hda_dsp_post_fw_run(struct snd_sof_dev *sdev) in hda_dsp_post_fw_run() argument
530 if (sdev->first_boot) { in hda_dsp_post_fw_run()
531 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; in hda_dsp_post_fw_run()
533 ret = hda_sdw_startup(sdev); in hda_dsp_post_fw_run()
535 dev_err(sdev->dev, in hda_dsp_post_fw_run()
542 (sdev->fw_ready.flags & SOF_IPC_INFO_D3_PERSISTENT || in hda_dsp_post_fw_run()
543 sdev->pdata->ipc_type == SOF_INTEL_IPC4)) in hda_dsp_post_fw_run()
547 hda_sdw_int_enable(sdev, true); in hda_dsp_post_fw_run()
550 return hda_dsp_ctrl_clock_power_gating(sdev, true); in hda_dsp_post_fw_run()
553 int hda_dsp_ext_man_get_cavs_config_data(struct snd_sof_dev *sdev, in hda_dsp_ext_man_get_cavs_config_data() argument
558 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_ext_man_get_cavs_config_data()
565 dev_err(sdev->dev, "cavs config data is inconsistent: %d\n", elem_num); in hda_dsp_ext_man_get_cavs_config_data()
576 dev_dbg(sdev->dev, "FW clock config: %s\n", in hda_dsp_ext_man_get_cavs_config_data()
584 dev_info(sdev->dev, "unsupported token type: %d\n", in hda_dsp_ext_man_get_cavs_config_data()