Lines Matching refs:sdev
23 static void hda_dsp_ipc_host_done(struct snd_sof_dev *sdev) in hda_dsp_ipc_host_done() argument
29 snd_sof_dsp_update_bits_forced(sdev, HDA_DSP_BAR, in hda_dsp_ipc_host_done()
35 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, in hda_dsp_ipc_host_done()
41 static void hda_dsp_ipc_dsp_done(struct snd_sof_dev *sdev) in hda_dsp_ipc_dsp_done() argument
47 snd_sof_dsp_update_bits_forced(sdev, HDA_DSP_BAR, in hda_dsp_ipc_dsp_done()
53 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, in hda_dsp_ipc_dsp_done()
59 int hda_dsp_ipc_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg) in hda_dsp_ipc_send_msg() argument
62 sof_mailbox_write(sdev, sdev->host_box.offset, msg->msg_data, in hda_dsp_ipc_send_msg()
64 snd_sof_dsp_write(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCI, in hda_dsp_ipc_send_msg()
70 int hda_dsp_ipc4_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg) in hda_dsp_ipc4_send_msg() argument
76 sof_mailbox_write(sdev, sdev->host_box.offset, msg_data->data_ptr, in hda_dsp_ipc4_send_msg()
79 snd_sof_dsp_write(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE, msg_data->extension); in hda_dsp_ipc4_send_msg()
80 snd_sof_dsp_write(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCI, in hda_dsp_ipc4_send_msg()
86 void hda_dsp_ipc_get_reply(struct snd_sof_dev *sdev) in hda_dsp_ipc_get_reply() argument
88 struct snd_sof_ipc_msg *msg = sdev->msg; in hda_dsp_ipc_get_reply()
98 dev_warn(sdev->dev, "unexpected ipc interrupt raised!\n"); in hda_dsp_ipc_get_reply()
117 snd_sof_ipc_get_reply(sdev); in hda_dsp_ipc_get_reply()
124 struct snd_sof_dev *sdev = context; in hda_dsp_ipc4_irq_thread() local
128 hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE); in hda_dsp_ipc4_irq_thread()
131 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL, in hda_dsp_ipc4_irq_thread()
133 hda_dsp_ipc_dsp_done(sdev); in hda_dsp_ipc4_irq_thread()
138 hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT); in hda_dsp_ipc4_irq_thread()
141 u32 hipcte = snd_sof_dsp_read(sdev, HDA_DSP_BAR, in hda_dsp_ipc4_irq_thread()
147 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL, in hda_dsp_ipc4_irq_thread()
152 if (likely(sdev->fw_state == SOF_FW_BOOT_COMPLETE)) { in hda_dsp_ipc4_irq_thread()
153 struct sof_ipc4_msg *data = sdev->ipc->msg.reply_data; in hda_dsp_ipc4_irq_thread()
158 spin_lock_irq(&sdev->ipc_lock); in hda_dsp_ipc4_irq_thread()
160 snd_sof_ipc_get_reply(sdev); in hda_dsp_ipc4_irq_thread()
161 snd_sof_ipc_reply(sdev, data->primary); in hda_dsp_ipc4_irq_thread()
163 spin_unlock_irq(&sdev->ipc_lock); in hda_dsp_ipc4_irq_thread()
165 dev_dbg_ratelimited(sdev->dev, in hda_dsp_ipc4_irq_thread()
174 sdev->ipc->msg.rx_data = ¬ification_data; in hda_dsp_ipc4_irq_thread()
175 snd_sof_ipc_msgs_rx(sdev); in hda_dsp_ipc4_irq_thread()
176 sdev->ipc->msg.rx_data = NULL; in hda_dsp_ipc4_irq_thread()
180 hda_dsp_ipc_host_done(sdev); in hda_dsp_ipc4_irq_thread()
187 dev_dbg_ratelimited(sdev->dev, "nothing to do in IPC IRQ thread\n"); in hda_dsp_ipc4_irq_thread()
195 struct snd_sof_dev *sdev = context; in hda_dsp_ipc_irq_thread() local
205 hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, in hda_dsp_ipc_irq_thread()
207 hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT); in hda_dsp_ipc_irq_thread()
208 hipci = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCI); in hda_dsp_ipc_irq_thread()
209 hipcte = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCTE); in hda_dsp_ipc_irq_thread()
216 trace_sof_intel_ipc_firmware_response(sdev, msg, msg_ext); in hda_dsp_ipc_irq_thread()
219 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, in hda_dsp_ipc_irq_thread()
233 if (likely(sdev->fw_state == SOF_FW_BOOT_COMPLETE)) { in hda_dsp_ipc_irq_thread()
234 spin_lock_irq(&sdev->ipc_lock); in hda_dsp_ipc_irq_thread()
237 hda_dsp_ipc_get_reply(sdev); in hda_dsp_ipc_irq_thread()
238 snd_sof_ipc_reply(sdev, msg); in hda_dsp_ipc_irq_thread()
241 hda_dsp_ipc_dsp_done(sdev); in hda_dsp_ipc_irq_thread()
243 spin_unlock_irq(&sdev->ipc_lock); in hda_dsp_ipc_irq_thread()
245 dev_dbg_ratelimited(sdev->dev, "IPC reply before FW_READY: %#x\n", in hda_dsp_ipc_irq_thread()
257 trace_sof_intel_ipc_firmware_initiated(sdev, msg, msg_ext); in hda_dsp_ipc_irq_thread()
260 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, in hda_dsp_ipc_irq_thread()
266 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_ipc_irq_thread()
277 if (sdev->fw_state == SOF_FW_BOOT_IN_PROGRESS && in hda_dsp_ipc_irq_thread()
281 snd_sof_dsp_panic(sdev, HDA_DSP_PANIC_OFFSET(msg_ext), in hda_dsp_ipc_irq_thread()
285 snd_sof_ipc_msgs_rx(sdev); in hda_dsp_ipc_irq_thread()
288 hda_dsp_ipc_host_done(sdev); in hda_dsp_ipc_irq_thread()
297 dev_dbg_ratelimited(sdev->dev, in hda_dsp_ipc_irq_thread()
305 bool hda_dsp_check_ipc_irq(struct snd_sof_dev *sdev) in hda_dsp_check_ipc_irq() argument
307 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_check_ipc_irq()
312 irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS); in hda_dsp_check_ipc_irq()
313 trace_sof_intel_hda_irq_ipc_check(sdev, irq_status); in hda_dsp_check_ipc_irq()
334 int hda_dsp_ipc_get_mailbox_offset(struct snd_sof_dev *sdev) in hda_dsp_ipc_get_mailbox_offset() argument
339 int hda_dsp_ipc_get_window_offset(struct snd_sof_dev *sdev, u32 id) in hda_dsp_ipc_get_window_offset() argument
344 int hda_ipc_msg_data(struct snd_sof_dev *sdev, in hda_ipc_msg_data() argument
348 if (!substream || !sdev->stream_box.size) { in hda_ipc_msg_data()
349 sof_mailbox_read(sdev, sdev->dsp_box.offset, p, sz); in hda_ipc_msg_data()
362 sof_mailbox_read(sdev, hda_stream->sof_intel_stream.posn_offset, p, sz); in hda_ipc_msg_data()
368 int hda_set_stream_data_offset(struct snd_sof_dev *sdev, in hda_set_stream_data_offset() argument
379 if (posn_offset > sdev->stream_box.size || in hda_set_stream_data_offset()
383 hda_stream->sof_intel_stream.posn_offset = sdev->stream_box.offset + posn_offset; in hda_set_stream_data_offset()
385 dev_dbg(sdev->dev, "pcm: stream dir %d, posn mailbox offset is %zu", in hda_set_stream_data_offset()