Lines Matching +full:ipc +full:- +full:3
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
21 #include "../ipc4-priv.h"
24 #include "hda-ipc.h"
25 #include "../sof-audio.h"
64 if (likely(sdev->fw_state == SOF_FW_BOOT_COMPLETE)) { in cnl_ipc4_irq_thread()
65 struct sof_ipc4_msg *data = sdev->ipc->msg.reply_data; in cnl_ipc4_irq_thread()
67 data->primary = primary; in cnl_ipc4_irq_thread()
68 data->extension = extension; in cnl_ipc4_irq_thread()
70 spin_lock_irq(&sdev->ipc_lock); in cnl_ipc4_irq_thread()
73 snd_sof_ipc_reply(sdev, data->primary); in cnl_ipc4_irq_thread()
75 spin_unlock_irq(&sdev->ipc_lock); in cnl_ipc4_irq_thread()
77 dev_dbg_ratelimited(sdev->dev, in cnl_ipc4_irq_thread()
78 "IPC reply before FW_READY: %#x|%#x\n", in cnl_ipc4_irq_thread()
86 sdev->ipc->msg.rx_data = ¬ification_data; in cnl_ipc4_irq_thread()
88 sdev->ipc->msg.rx_data = NULL; in cnl_ipc4_irq_thread()
99 dev_dbg_ratelimited(sdev->dev, "nothing to do in IPC IRQ thread\n"); in cnl_ipc4_irq_thread()
132 if (likely(sdev->fw_state == SOF_FW_BOOT_COMPLETE)) { in cnl_ipc_irq_thread()
133 spin_lock_irq(&sdev->ipc_lock); in cnl_ipc_irq_thread()
141 spin_unlock_irq(&sdev->ipc_lock); in cnl_ipc_irq_thread()
143 dev_dbg_ratelimited(sdev->dev, "IPC reply before FW_READY: %#x\n", in cnl_ipc_irq_thread()
159 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in cnl_ipc_irq_thread()
170 if (sdev->fw_state == SOF_FW_BOOT_IN_PROGRESS && in cnl_ipc_irq_thread()
171 hda->boot_iteration < HDA_FW_BOOT_ATTEMPTS) in cnl_ipc_irq_thread()
189 dev_dbg_ratelimited(sdev->dev, in cnl_ipc_irq_thread()
190 "nothing to do in IPC IRQ thread\n"); in cnl_ipc_irq_thread()
219 * set DONE bit - tell DSP we have received the reply msg in cnl_ipc_dsp_done()
237 struct sof_ipc_pm_gate *pm_gate = msg->msg_data; in cnl_compact_ipc_compress()
239 if (pm_gate->hdr.cmd == (SOF_IPC_GLB_PM_MSG | SOF_IPC_PM_GATE)) { in cnl_compact_ipc_compress()
244 *dd = pm_gate->flags; in cnl_compact_ipc_compress()
254 struct sof_ipc4_msg *msg_data = msg->msg_data; in cnl_ipc4_send_msg()
257 if (msg_data->data_size) in cnl_ipc4_send_msg()
258 sof_mailbox_write(sdev, sdev->host_box.offset, msg_data->data_ptr, in cnl_ipc4_send_msg()
259 msg_data->data_size); in cnl_ipc4_send_msg()
261 snd_sof_dsp_write(sdev, HDA_DSP_BAR, CNL_DSP_REG_HIPCIDD, msg_data->extension); in cnl_ipc4_send_msg()
263 msg_data->primary | CNL_DSP_REG_HIPCIDR_BUSY); in cnl_ipc4_send_msg()
270 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; in cnl_ipc_send_msg()
276 * Currently the only compact IPC supported is the PM_GATE in cnl_ipc_send_msg()
277 * IPC which is used for transitioning the DSP between the in cnl_ipc_send_msg()
280 * that a compact IPC results in the DSP exiting D0I3 without in cnl_ipc_send_msg()
284 /* send the message via IPC registers */ in cnl_ipc_send_msg()
293 sof_mailbox_write(sdev, sdev->host_box.offset, msg->msg_data, in cnl_ipc_send_msg()
294 msg->msg_size); in cnl_ipc_send_msg()
298 hdr = msg->msg_data; in cnl_ipc_send_msg()
303 * IPCs are sent at a high-rate. mod_delayed_work() in cnl_ipc_send_msg()
306 * CTX_SAVE IPC, which is sent before the DSP enters D3. in cnl_ipc_send_msg()
308 if (hdr->cmd != (SOF_IPC_GLB_PM_MSG | SOF_IPC_PM_CTX_SAVE)) in cnl_ipc_send_msg()
309 mod_delayed_work(system_wq, &hdev->d0i3_work, in cnl_ipc_send_msg()
323 /* read IPC status */ in cnl_ipc_dump()
328 /* dump the IPC regs */ in cnl_ipc_dump()
330 dev_err(sdev->dev, in cnl_ipc_dump()
349 /* dump the IPC regs */ in cnl_ipc4_dump()
351 dev_err(sdev->dev, in cnl_ipc4_dump()
352 "Host IPC initiator: %#x|%#x|%#x, target: %#x|%#x|%#x, ctl: %#x\n", in cnl_ipc4_dump()
368 /* ipc */ in sof_cnl_ops_init()
369 if (sdev->pdata->ipc_type == SOF_IPC) { in sof_cnl_ops_init()
373 /* ipc */ in sof_cnl_ops_init()
380 if (sdev->pdata->ipc_type == SOF_INTEL_IPC4) { in sof_cnl_ops_init()
383 sdev->private = devm_kzalloc(sdev->dev, sizeof(*ipc4_data), GFP_KERNEL); in sof_cnl_ops_init()
384 if (!sdev->private) in sof_cnl_ops_init()
385 return -ENOMEM; in sof_cnl_ops_init()
387 ipc4_data = sdev->private; in sof_cnl_ops_init()
388 ipc4_data->manifest_fw_hdr_offset = SOF_MAN4_FW_HDR_OFFSET; in sof_cnl_ops_init()
390 ipc4_data->mtrace_type = SOF_IPC4_MTRACE_INTEL_CAVS_1_8; in sof_cnl_ops_init()
395 /* ipc */ in sof_cnl_ops_init()
426 .host_managed_cores_mask = GENMASK(3, 0),
450 * two cores, it cannot support the IceLake-specific power-up sequences