33 #define TRCM_TXRX 0
135  * Returns success (0) or negative errno.
139 	int ret = 0;  in i2s_tdm_prepare_enable_mclk()
162 	return 0;  in i2s_tdm_prepare_enable_mclk()
185 	return 0;  in i2s_tdm_runtime_suspend()
208 	return 0;  in i2s_tdm_runtime_resume()
225  * when clk_trcm > 0.
266 	unsigned int xfer_mask = 0;  in rockchip_snd_xfer_clear()
267 	unsigned int xfer_val = 0;  in rockchip_snd_xfer_clear()
333 /* only used when clk_trcm > 0 */
361 		if (--i2s_tdm->refcount == 0) {  in rockchip_snd_txrxctrl()
408 	if (ret < 0 && ret != -EACCES)  in rockchip_i2s_tdm_set_fmt()
501 			tdm_val = TDM_SHIFT_CTRL(0);  in rockchip_i2s_tdm_set_fmt()
505 			tdm_val = TDM_SHIFT_CTRL(0);  in rockchip_i2s_tdm_set_fmt()
577 		return 0;  in rockchip_i2s_tdm_clk_set_rate()
579 	if (ppm < 0)  in rockchip_i2s_tdm_clk_set_rate()
598 	return 0;  in rockchip_i2s_tdm_clk_set_rate()
654 					    mclk_root_freq, 0);  in rockchip_i2s_tdm_calibrate_mclk()
719 	return 0;  in rockchip_i2s_tdm_set_mclk()
754 	unsigned int val = 0;  in rockchip_i2s_io_multiplex()
757 		return 0;  in rockchip_i2s_io_multiplex()
805 	return 0;  in rockchip_i2s_io_multiplex()
818 		return 0;  in rockchip_i2s_trcm_mode()
844 	return 0;  in rockchip_i2s_trcm_mode()
853 	int ret = 0;  in rockchip_i2s_tdm_hw_params()
854 	unsigned int val = 0;  in rockchip_i2s_tdm_hw_params()
959 			rockchip_snd_txrxctrl(substream, dai, 0);  in rockchip_i2s_tdm_trigger()
961 			rockchip_snd_rxctrl(i2s_tdm, 0);  in rockchip_i2s_tdm_trigger()
963 			rockchip_snd_txctrl(i2s_tdm, 0);  in rockchip_i2s_tdm_trigger()
969 	return 0;  in rockchip_i2s_tdm_trigger()
991 	return 0;  in rockchip_i2s_tdm_set_sysclk()
1003 	return 0;  in rockchip_i2s_tdm_clk_compensation_info()
1012 	ucontrol->value.integer.value[0] = i2s_tdm->clk_ppm;  in rockchip_i2s_tdm_clk_compensation_get()
1014 	return 0;  in rockchip_i2s_tdm_clk_compensation_get()
1022 	int ret = 0, ppm = 0;  in rockchip_i2s_tdm_clk_compensation_put()
1023 	int changed = 0;  in rockchip_i2s_tdm_clk_compensation_put()
1026 	if (ucontrol->value.integer.value[0] < CLK_PPM_MIN ||  in rockchip_i2s_tdm_clk_compensation_put()
1027 	    ucontrol->value.integer.value[0] > CLK_PPM_MAX)  in rockchip_i2s_tdm_clk_compensation_put()
1030 	ppm = ucontrol->value.integer.value[0];  in rockchip_i2s_tdm_clk_compensation_put()
1074 	return 0;  in rockchip_i2s_tdm_dai_probe()
1094 	return 0;  in rockchip_dai_tdm_slot()
1107 	return 0;  in rockchip_i2s_tdm_set_bclk_ratio()
1191 	{0x00, 0x7200000f},
1192 	{0x04, 0x01c8000f},
1193 	{0x08, 0x00001f1f},
1194 	{0x10, 0x001f0000},
1195 	{0x14, 0x01f00000},
1196 	{0x30, 0x00003eff},
1197 	{0x34, 0x00003eff},
1198 	{0x38, 0x00000707},
1219 	u32 reg = 0, val = 0, trcm = i2s_tdm->clk_trcm;  in common_soc_init()
1223 		return 0;  in common_soc_init()
1225 	for (i = 0; i < i2s_tdm->soc_data->config_count; i++) {  in common_soc_init()
1238 	return 0;  in common_soc_init()
1242 	{ 0xff060000, 0x184, PX30_I2S0_CLK_TXONLY, PX30_I2S0_CLK_RXONLY },
1246 	{ 0xff7e0000, 0x190, RK1808_I2S0_CLK_TXONLY, RK1808_I2S0_CLK_RXONLY },
1250 	{ 0xff300000, 0x308, RK3308_I2S0_CLK_TXONLY, RK3308_I2S0_CLK_RXONLY },
1251 	{ 0xff310000, 0x308, RK3308_I2S1_CLK_TXONLY, RK3308_I2S1_CLK_RXONLY },
1255 	{ 0xfe410000, 0x504, RK3568_I2S1_CLK_TXONLY, RK3568_I2S1_CLK_RXONLY },
1256 	{ 0xfe410000, 0x508, RK3568_I2S1_MCLK_TX_OE, RK3568_I2S1_MCLK_RX_OE },
1257 	{ 0xfe420000, 0x508, RK3568_I2S2_MCLK_OE, RK3568_I2S2_MCLK_OE },
1258 	{ 0xfe430000, 0x504, RK3568_I2S3_CLK_TXONLY, RK3568_I2S3_CLK_RXONLY },
1259 	{ 0xfe430000, 0x508, RK3568_I2S3_MCLK_TXONLY, RK3568_I2S3_MCLK_RXONLY },
1260 	{ 0xfe430000, 0x508, RK3568_I2S3_MCLK_OE, RK3568_I2S3_MCLK_OE },
1264 	{ 0xff800000, 0x10260, RV1126_I2S0_CLK_TXONLY, RV1126_I2S0_CLK_RXONLY },
1268 	.softrst_offset = 0x0300,
1275 	.softrst_offset = 0x0300,
1282 	.softrst_offset = 0x0400,
1283 	.grf_reg_offset = 0x0308,
1291 	.softrst_offset = 0x0400,
1298 	.softrst_offset = 0x0300,
1361 	return 0;  in rockchip_i2s_tdm_init_dai()
1376 	for (i = 0; i < num; i++) {  in rockchip_i2s_tdm_path_check()
1385 		for (j = 0; j < num; j++) {  in rockchip_i2s_tdm_path_check()
1400 	return 0;  in rockchip_i2s_tdm_path_check()
1408 	for (idx = 0; idx < num; idx++) {  in rockchip_i2s_tdm_tx_path_config()
1420 	for (idx = 0; idx < num; idx++) {  in rockchip_i2s_tdm_rx_path_config()
1438 	int num_mclks = 0;  in rockchip_i2s_tdm_get_calibrate_mclks()
1456 	if (num_mclks < 4 && num_mclks != 0)  in rockchip_i2s_tdm_get_calibrate_mclks()
1462 	return 0;  in rockchip_i2s_tdm_get_calibrate_mclks()
1473 	int num, ret = 0;  in rockchip_i2s_tdm_path_prepare()
1484 	if (num < 0) {  in rockchip_i2s_tdm_path_prepare()
1500 	if (ret < 0) {  in rockchip_i2s_tdm_path_prepare()
1508 	if (ret < 0) {  in rockchip_i2s_tdm_path_prepare()
1516 	return 0;  in rockchip_i2s_tdm_path_prepare()
1522 	return rockchip_i2s_tdm_path_prepare(i2s_tdm, np, 0);  in rockchip_i2s_tdm_tx_path_prepare()
1617 	regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);  in rockchip_i2s_tdm_probe()
1643 	if (ret < 0) {  in rockchip_i2s_tdm_probe()
1649 	if (ret < 0) {  in rockchip_i2s_tdm_probe()
1697 	ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);  in rockchip_i2s_tdm_probe()
1703 	return 0;  in rockchip_i2s_tdm_probe()
1723 	return 0;  in rockchip_i2s_tdm_remove()
1732 	return 0;  in rockchip_i2s_tdm_suspend()
1741 	if (ret < 0)  in rockchip_i2s_tdm_resume()